llvm-svn: 35241

llvm-svn: 35240

llvm-svn: 35239

llvm-svn: 35237

Okay, really fix it this time. Make sure the CurFun.Linkage is set early
and consolidate some duplicate code.

llvm-svn: 35236

llvm-svn: 35235

Make Signedness information pervasive throughout all types and values.
There is no easy way to get around this. Because the GEP instruction can
index through an arbitrarily complex value structure, it is necessary to
keep track of signedness information throughout that structure. This change
makes Signedness a full class, capable of representing Signedness in
arbitrarily shaped types. The class is then used throughout llvm-upgrade to
track signedness and differentiate between globals, locals, and functions
based on their signedness.

For PR1243:
This patch also removes bogus warnings about renaming internal globals. It
now only emits such warnings when renaming non-internal globals because
they may affect linkage.

llvm-svn: 35234

is the frame pointer.

llvm-svn: 35233

some test cases for bitwidth > 64.

llvm-svn: 35232

llvm-svn: 35230

llvm-svn: 35229

llvm-svn: 35228

instructions (that would have to be split later)

llvm-svn: 35227

llvm-svn: 35226

Avoid recursion, Use iterative algorithm.

llvm-svn: 35225

llvm-svn: 35224

Get pos/neg infinity the correct way.

llvm-svn: 35223

LoopSimplify::FindPHIToPartitionLoops()
Use ETForest instead of DominatorSet.

llvm-svn: 35222

Use ETForest instead of DominatorSet.

llvm-svn: 35221

llvm-svn: 35220

llvm-svn: 35219

    mov lr, pc
    bx lr
So, the function was not called.

llvm-svn: 35218

llvm-svn: 35217

llvm-svn: 35216

llvm-svn: 35215

llvm-svn: 35214

llvm-svn: 35213

llvm-svn: 35212

llvm-svn: 35211

llvm-svn: 35210

llvm-svn: 35209

llvm-svn: 35208

Make two piece constant generation as a single instruction. It's re-materialized as a load from constantpool.

llvm-svn: 35207

llvm-svn: 35206

llvm-svn: 35205

1) codegen a shift of a register as a shift, not an LEA.
2) teach the RA to convert a shift to an LEA instruction if it wants something
   in three-address form.

This gives us asm diffs like:

-       leal (,%eax,4), %eax
+       shll $2, %eax

which is faster on some processors and smaller on all of them.

and, more interestingly:

-       movl 24(%esi), %eax
-       leal (,%eax,4), %edi
+       movl 24(%esi), %edi
+       shll $2, %edi

Without #2, #1 was a significant pessimization in some cases.

This implements CodeGen/X86/shift-codegen.ll

llvm-svn: 35204

llvm-svn: 35203

llvm-svn: 35202

llvm-svn: 35201

llvm-svn: 35200