This matches GNU ar behavior. Also remove the now unused getFileStatus method.
Not sure how to add a test, it would have to run ls -l or something like that.

llvm-svn: 184337

llvm-svn: 184328

llvm-svn: 184325

llvm-svn: 184320

llvm-svn: 184318

The type <3 x i8> is a common in graphics and we want to be able to vectorize it.

This changes accelerates bullet by 12% and 471_omnetpp by 5%.

llvm-svn: 184317

llvm-svn: 184316

llvm-svn: 184315

llvm-svn: 184311

It is not present in GNU or OS X versions and doesn't make a lot of sense
for llvm-ar.

llvm-svn: 184306

llvm-svn: 184305

llvm-svn: 184298

The RenderMethod field in RegisterOperand class sets the name of the method on the target specific operand to call to add the target specific operand to an MCInst. This patch defines RenderMethod for mips RegisterOperand classes and removes redundant code from MipsAsmParser.cpp

llvm-svn: 184292

llvm-svn: 184291

llvm-svn: 184286

llvm-svn: 184282

llvm-svn: 184281

llvm-svn: 184278

There were only two places it was actually making anything shorter.

llvm-svn: 184273

llvm-svn: 184272

Not sure why we weren't catching this with -Wunused-parameter...

Spotted by inspection.

llvm-svn: 184271

llvm-svn: 184269

llvm-svn: 184268

llvm-svn: 184267

llvm-svn: 184263

llvm-svn: 184261

Previously, we would monkeypatch the vector of YAML::Section's in order
to ensure that the SHT_NULL entry is present. Now we just add it
unconditionally.

The proliferation of small numerical adjustments is beginning to
frighten me, but I can't think of a way having a single point of truth
for them without introducing a whole new layer  of data structures (i.e.
lots of code and complexity) between the YAML and binary ELF formats.

llvm-svn: 184260

llvm-svn: 184258

Currently, we only output the name.

llvm-svn: 184255

The information was correct pre-LPAE.

llvm-svn: 184253

llvm-svn: 184247

rdar://14194152

llvm-svn: 184244

This will be needed later for holding symbol names, due to the libObject
issue mentioned in the commit message of r184161.

llvm-svn: 184242

llvm-svn: 184239

llvm-svn: 184236

llvm-svn: 184235

llvm-svn: 184233

[ARMTargetLowering] ARMISD::{SUB,ADD}{C,E} second result is a boolean implying that upper bits are always 0.

llvm-svn: 184231

Said assert assumes that ADDC will always have a glue node as its second
argument and is checked before we even know that we are actually performing the
relevant MLAL optimization. This is incorrect since on ARM we *CAN* codegen ADDC
with a use list based second argument. Thus to have both effects, I converted
the assert to a conditional check which if it fails we do not perform the
optimization.

In terms of tests I can not produce an ADDC from the IR level until I get in my
multiprecision optimization patch which is forthcoming. The tests for said patch
would cause this assert to fail implying that said tests will provide the
relevant tests.

llvm-svn: 184230

llvm-svn: 184229