* Rename hasSSE -> hasSSE1 to avoid my continual confusion with 'has any SSE'.
* Add inline asm constraint specification.

llvm-svn: 25854

llvm-svn: 25831

the order of the compare operands and generate SETOGT, SETOGE, SETUGE, and
SETULE instead.

llvm-svn: 25824

llvm-svn: 25818

conversions. SSE does not have instructions to handle these tasks.

llvm-svn: 25817

Move MaskedValueIsZero from the DAGCombiner to the TargetLowering interface,making isMaskedValueZeroForTargetNode simpler, and useable from other partsof the compiler.

llvm-svn: 25803

llvm-svn: 25798

instead of lying and saying we have it.

llvm-svn: 25775

'fpimm' in .td files is now TargetConstantFP.

llvm-svn: 25771

llvm-svn: 25745

llvm-svn: 25700

the same functionality.  This addresses another piece of bug 680.  Next,
on to fixing Alpha VAARG, which I broke last time.

llvm-svn: 25696

llvm-svn: 25679

one use. This allows more CMOV instructions.

llvm-svn: 25634

Remove TLI.LowerVA* and replace it with SDNodes that are lowered the same
way as everything else.

llvm-svn: 25606

llvm-svn: 25602

llvm-svn: 25596

llvm-svn: 25584

node, fixing fastcc and the case where a function has a frame pointer due
to dynamic allocas.

llvm-svn: 25580

llvm-svn: 25484

llvm-svn: 25457

llvm-svn: 25435

llvm-svn: 25416

llvm-svn: 25415

llvm-svn: 25413

expand it), so ask legalizer to expand i32 UINT_TO_FP.

llvm-svn: 25386

llvm-svn: 25381

read a flag.

llvm-svn: 25378

llvm-svn: 25368

llvm-svn: 25333

llvm-svn: 25312

flipped around.

llvm-svn: 25290

llvm-svn: 25278

llvm-svn: 25272

llvm-svn: 25261

llvm-svn: 25260

llvm-svn: 25259

llvm-svn: 25257

linked together).

llvm-svn: 25247

  LEA32r.
* Do not lower GlobalAddress to TargetGlobalAddress. Let isel does it.

llvm-svn: 25246