- Oct 11, 2013
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Benjamin Kramer authored
llvm-svn: 192492
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rdar://problem/13635174Greg Clayton authored
Added a way to set hardware breakpoints from the "breakpoint set" command with the new "--hardware" option. Hardware breakpoints are not a request, they currently are a requirement. So when breakpoints are specified as hardware breakpoints, they might fail to be set when they are able to be resolved and should be used sparingly. This is currently hooked up for GDB remote debugging. Linux and FreeBSD should quickly enable this feature if possible, or return an error for any breakpoints that are hardware breakpoint sites in the "virtual Error Process::EnableBreakpointSite (BreakpointSite *bp_site);" function. llvm-svn: 192491
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Daniel Jasper authored
In certain macros or incorrect string literals, the token stream can contain 'unknown' tokens, e.g. a single backslash or a set of empty ticks. clang-format simply treated them as whitespace and removed them prior to this patch. This fixes llvm.org/PR17215 llvm-svn: 192490
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Sean Callanan authored
<rdar://problem/15188389> llvm-svn: 192489
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Richard Mitton authored
llvm-svn: 192488
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Benjamin Kramer authored
llvm-svn: 192487
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Ed Maste authored
llvm-svn: 192486
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Richard Mitton authored
llvm-svn: 192484
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Benjamin Kramer authored
This doesn't change the meaning of the output, but makes look right. PR17539. llvm-svn: 192483
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Matthias Braun authored
When if converting something like: true: ... = R0<kill> false: ... = R0<kill> then the instructions of the true block must not have a <kill> flag anymore, as the instruction of the false block follow and do still read the R0 value. Specifically this patch determines the set of register live-in in the false block (possibly after simulating the liveness changes of the duplicated instructions). Each of these live-in registers mustn't be killed. llvm-svn: 192482
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Matthias Braun authored
Contains a set of live register (units) and code to move forward and backward in the schedule while updating the live set. llvm-svn: 192481
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Quentin Colombet authored
[DAGCombiner] Load slicing test case: attempt to really fix the buildbots (used sse4.2 instead of avx!). <rdar://problem/14477220> llvm-svn: 192480
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Renato Golin authored
llvm-svn: 192479
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Manman Ren authored
llvm-svn: 192478
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Stephen Lin authored
Really fix CHECK-LABEL and CHECK-DAG interaction. This actually just restores the initial implementation that was in r186162 but got lost in some subsequent refactoring. More explicit variable names and comments are present now to hopefully prevent repeat regression, as well as another test. llvm-svn: 192477
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Quentin Colombet authored
This should fix the buildbots. Original commit message: [DAGCombiner] Slice a big load in two loads when the element are next to each other in memory and the target has paired load and performs post-isel loads combining. E.g., this optimization will transform something like this: a = load i64* addr b = trunc i64 a to i32 c = lshr i64 a, 32 d = trunc i64 c to i32 into: b = load i32* addr1 d = load i32* addr2 Where addr1 = addr2 +/- sizeof(i32), if the target supports paired load and performs post-isel loads combining. One should overload TargetLowering::hasPairedLoad to provide this information. The default is false. <rdar://problem/14477220> llvm-svn: 192476
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Quentin Colombet authored
llvm-svn: 192474
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Eric Christopher authored
llvm-svn: 192473
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Matthias Braun authored
This reverts r192454 Apparently FileCheck isn't as smart as I though and does not enforce a topological order between variable defs+uses. llvm-svn: 192472
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Quentin Colombet authored
other in memory and the target has paired load and performs post-isel loads combining. E.g., this optimization will transform something like this: a = load i64* addr b = trunc i64 a to i32 c = lshr i64 a, 32 d = trunc i64 c to i32 into: b = load i32* addr1 d = load i32* addr2 Where addr1 = addr2 +/- sizeof(i32), if the target supports paired load and performs post-isel loads combining. One should overload TargetLowering::hasPairedLoad to provide this information. The default is false. <rdar://problem/14477220> llvm-svn: 192471
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Shankar Easwaran authored
There are aliases for --start-group/--end-group options represented by -( and -) respectively in the command line. This change adds and improves the test for the alias options to be tested. Looks like users use this option widely than explicitly using --start-group/--end-group. llvm-svn: 192470
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Ed Maste authored
Just pass a Target* into ObjectFileELF::GetImageInfoAddress so that it can do the extra dereference necessary on MIPS, instead of passing a flag back to the caller. Review: http://llvm-reviews.chandlerc.com/D1899 llvm-svn: 192469
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Fariborz Jahanian authored
migration, the typedef has annotations. // rdar://15200602 llvm-svn: 192468
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Ed Maste authored
llvm-svn: 192467
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Daniel Malea authored
llvm-svn: 192466
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Hans Wennborg authored
llvm-svn: 192465
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Rafael Espindola authored
llvm-svn: 192464
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Rafael Espindola authored
llvm-svn: 192463
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Ed Maste authored
llvm-svn: 192462
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Renato Golin authored
llvm-svn: 192460
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Amara Emerson authored
llvm-svn: 192458
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Matthias Braun authored
llvm-svn: 192455
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Matthias Braun authored
llvm-svn: 192454
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Sergey Matveev authored
llvm-svn: 192453
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Dmitry Vyukov authored
llvm-svn: 192452
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Matheus Almeida authored
llvm-svn: 192451
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Matheus Almeida authored
llvm-svn: 192450
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Matheus Almeida authored
llvm-svn: 192449
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Dmitry Vyukov authored
Currently data-race-test unittests fail with the following false positive: WARNING: ThreadSanitizer: data race (pid=20365) Write of size 8 at 0x7da000008050 by thread T54: #0 close tsan_interceptors.cc:1483 (racecheck_unittest-linux-amd64-O0+0x0000000eb34a) #1 NegativeTests_epoll::Worker2() unittest/posix_tests.cc:1148 (racecheck_unittest-linux-amd64-O0+0x0000000cc6b1) #2 MyThread::ThreadBody(MyThread*) unittest/./thread_wrappers_pthread.h:367 (racecheck_unittest-linux-amd64-O0+0x000000097500) Previous read of size 8 at 0x7da000008050 by thread T49: #0 epoll_ctl tsan_interceptors.cc:1646 (racecheck_unittest-linux-amd64-O0+0x0000000e9fee) #1 NegativeTests_epoll::Worker1() unittest/posix_tests.cc:1140 (racecheck_unittest-linux-amd64-O0+0x0000000cc5b5) #2 MyThread::ThreadBody(MyThread*) unittest/./thread_wrappers_pthread.h:367 (racecheck_unittest-linux-amd64-O0+0x000000097500) llvm-svn: 192448
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Matheus Almeida authored
INSERT is the first type of MSA instruction that requires a change to the way MSA registers are parsed. This happens because MSA registers may be suffixed by an index in the form of an immediate or a general purpose register. The changes to parseMSARegs reflect that requirement. llvm-svn: 192447
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