- May 29, 2010
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- May 13, 2010
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Dan Gohman authored
when they move instructions. llvm-svn: 103737
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- Apr 20, 2010
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Jakob Stoklund Olesen authored
register is not killed in the loop. This fixes 188.ammp on ARM where the post-ra scheduler would grab a register that looked available but wasn't. A testcase would be huge and fragile, sorry. llvm-svn: 101930
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- Apr 17, 2010
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Evan Cheng authored
the live-in sets of BBs in the loop. Otherwise later pass may end up using the registers and override the invariant. rdar://7852937 No reasonablly sized test case possible. llvm-svn: 101626
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- Apr 14, 2010
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Evan Cheng authored
llvm-svn: 101183
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- Apr 13, 2010
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Evan Cheng authored
llvm-svn: 101170
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Evan Cheng authored
Expand postra machine licm's capability a little more. If an instruction's register operands are all loop invariants, then it's safe to hoist it. llvm-svn: 101167
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Evan Cheng authored
Teach postra machine licm to hoist more obvious invariants, e.g. instructions with no source operands. llvm-svn: 101154
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Dan Gohman authored
MachineBasicBlock::livein_iterator a const_iterator, because clients shouldn't ever be using the iterator interface to mutate the livein set. llvm-svn: 101147
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- Apr 12, 2010
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Benjamin Kramer authored
llvm-svn: 101034
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- Apr 09, 2010
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Dan Gohman authored
llvm-svn: 100858
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- Apr 08, 2010
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Evan Cheng authored
llvm-svn: 100742
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- Apr 07, 2010
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Evan Cheng authored
llvm-svn: 100610
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Evan Cheng authored
llvm-svn: 100609
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Evan Cheng authored
llvm-svn: 100592
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- Mar 03, 2010
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Evan Cheng authored
- Change MachineInstr::isIdenticalTo to take a new option that determines whether it should skip checking defs or at least virtual register defs. This subsumes part of the TargetInstrInfo::isIdentical functionality. - Eliminate TargetInstrInfo::isIdentical and replace it with produceSameValue. In the default case, produceSameValue just checks whether two machine instructions are identical (except for virtual register defs). But targets may override it to check for unusual cases (e.g. ARM pic loads from constant pools). llvm-svn: 97628
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- Feb 28, 2010
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Dan Gohman authored
llvm-svn: 97360
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Dan Gohman authored
defs or uses. The regular def and use checking below covers them, and can be more precise. It's safe to hoist an instruction with a dead implicit def if the register isn't live into the loop header. llvm-svn: 97352
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- Feb 09, 2010
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Chris Lattner authored
into TargetOpcodes.h. #include the new TargetOpcodes.h into MachineInstr. Add new inline accessors (like isPHI()) to MachineInstr, and start using them throughout the codebase. llvm-svn: 95687
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- Jan 05, 2010
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David Greene authored
Change errs() to dbgs(). llvm-svn: 92547
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- Dec 18, 2009
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Dan Gohman authored
contains another loop, or an instruction. The loop form is substantially more efficient on large loops than the typical code it replaces. llvm-svn: 91654
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- Nov 21, 2009
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Evan Cheng authored
llvm-svn: 89510
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- Nov 20, 2009
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Evan Cheng authored
llvm-svn: 89477
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Jakob Stoklund Olesen authored
Fix debug code that assumes getBasicBlock never returns NULL. llvm-svn: 89428
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- Nov 17, 2009
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Evan Cheng authored
llvm-svn: 89129
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- Nov 07, 2009
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Evan Cheng authored
except it doesn't care if the definitions' virtual registers differ. This is used by machine LICM and other MI passes to perform CSE. - Teach Thumb2InstrInfo::isIdentical() to check two t2LDRpci_pic are identical. Since pc relative constantpool entries are always different, this requires it it check if the values can actually the same. llvm-svn: 86328
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- Nov 05, 2009
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Evan Cheng authored
llvm-svn: 86085
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- Nov 03, 2009
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Evan Cheng authored
llvm-svn: 85947
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- Nov 02, 2009
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Evan Cheng authored
llvm-svn: 85827
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Evan Cheng authored
the loop preheader. Add instructions which are already in the preheader block that may be common expressions of those that are hoisted out. These does get a few more instructions CSE'ed. llvm-svn: 85799
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- Oct 30, 2009
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Dan Gohman authored
unfolding loads for hoisting. getOpcodeAfterMemoryUnfold returns the opcode of the original operation without the load, not the load itself, MachineLICM needs to know the operand index in order to get the correct register class. Extend getOpcodeAfterMemoryUnfold to return this information. llvm-svn: 85622
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- Oct 29, 2009
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Dan Gohman authored
llvm-svn: 85515
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- Oct 28, 2009
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Dan Gohman authored
the new instructions and leave the old one in place. llvm-svn: 85393
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Dan Gohman authored
otherwise unhoistable instructions in order to allow the loads to be hoisted. llvm-svn: 85364
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- Oct 25, 2009
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Nick Lewycky authored
VISIBILITY_HIDDEN removal. llvm-svn: 85043
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Nick Lewycky authored
Chris claims we should never have visibility_hidden inside any .cpp file but that's still not true even after this commit. llvm-svn: 85042
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- Oct 10, 2009
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Dan Gohman authored
is trivially rematerializable and integrate it into TargetInstrInfo::isTriviallyReMaterializable. This way, all places that need to know whether an instruction is rematerializable will get the same answer. This enables the useful parts of the aggressive-remat option by default -- using AliasAnalysis to determine whether a memory location is invariant, and removes the questionable parts -- rematting operations with virtual register inputs that may not be live everywhere. llvm-svn: 83687
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- Oct 09, 2009
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Dan Gohman authored
TargetInstrDesc::isRematerializable flag, so it isn't necessary to do this check in its callers. llvm-svn: 83671
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Evan Cheng authored
llvm-svn: 83624
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Evan Cheng authored
llvm-svn: 83622
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