- Consolidate instruction formats.
- Other clean up.

llvm-svn: 58808

llvm-svn: 58800

llvm-svn: 58793

llvm-svn: 58789

llvm-svn: 58780

Restructure ARM code emitter to use instruction formats instead of addressing modes to determine how to encode instructions.

llvm-svn: 58764

llvm-svn: 58707

Add binary encoding support for multiply instructions. Some blanks left to fill in, but the basics are there.

llvm-svn: 58626

llvm-svn: 57524

llvm-svn: 56277

llvm-svn: 56276

llvm-svn: 56180

llvm-svn: 56176

llvm-svn: 56172

llvm-svn: 55601

llvm-svn: 55599

llvm-svn: 55598

llvm-svn: 55597

llvm-svn: 55596

llvm-svn: 55594

llvm-svn: 55593

llvm-svn: 55591

llvm-svn: 55590

llvm-svn: 55531

llvm-svn: 55528

llvm-svn: 55518