doing it directly.  This requires const'izing a bunch of stuff that
took sections, but this seems like the right semantic thing to do:
emitting a label to a section shouldn't mutate the MCSection object
itself, for example.

llvm-svn: 79227

llvm-svn: 79226

llvm-svn: 79222

llvm-svn: 79221

llvm-svn: 79213

llvm-svn: 79212

This also adds unit tests to APFloat that mainly tests the
string handling of APFloat, but not much else of it's api.

llvm-svn: 79210

offsetof, similar to getSizeOf for sizeof.

llvm-svn: 79208

or some other situation where no xmm registers need to be saved.

llvm-svn: 79207

llvm-svn: 79206

llvm-svn: 79195

Remove unused methods and make others private.

llvm-svn: 79194

If two uses of a CopyFromReg want different regclasses, first try a common
sub-class, then fall back on the copy emitted in AddRegisterOperand. There is
no need for an assert here. The cross-class joiner usually cleans up nicely.

llvm-svn: 79193

llvm-svn: 79189

llvm-svn: 79187

llvm-svn: 79175

unfoldable references to a PHI node in the block being folded, and disable
the transformation in that case.  The correct transformation of such PHI
nodes depends on whether BB dominates Succ, and dominance is expensive 
to compute here.  (Alternatively, it's possible to check whether any 
uses are live, but that's also essentially a dominance calculation. 
Another alternative is to use reg2mem, but it probably isn't a good idea to
use that in simplifycfg.)

Also, remove some incorrect code from CanPropagatePredecessorsForPHIs 
which is made unnecessary with this patch: it didn't consider the case 
where a PHI node in BB has multiple uses.

llvm-svn: 79174

can asmprint:

NEW: 	movl	"L___stack_chk_guard$non_lazy_ptr", %eax
OLD: 	movl	L___stack_chk_guard$non_lazy_ptr, %eax

where 'new' is coming out of the MCInst version of the printer.

llvm-svn: 79170

llvm-svn: 79167

llvm-svn: 79165

llvm-svn: 79163

llvm-svn: 79160

llvm-svn: 79159

llvm-svn: 79150

llvm-svn: 79146

llvm-svn: 79142

what was there before. In "no FP mode", we weren't generating labels and unwind
table entries after each "push" instruction. While more than likely "okay", it's
not technically correct. The major thing was that the ordering of when to define
a new CFA register and at what offset wasn't correct. This would cause the
exception handling to fail in ways most miserable to users.

I also cleaned up some code a bit. There's one function which has a "return" at
the beginning, so it's never used. Should I just remove it? :-)

llvm-svn: 79139

llvm-svn: 79136

llvm-svn: 79135

llvm-svn: 79134

llvm-svn: 79133

blocks.

llvm-svn: 79132

support unaligned mem access only for certain types. (Should it be size
instead?)

ARM v7 supports unaligned access for i16 and i32, some v6 variants support it
as well.

llvm-svn: 79127

It is legal for an inline asm operand to use an earlyclobber register if the
use operand is tied to the earlyclobber operand. The issue is discussed here:

  http://gcc.gnu.org/ml/gcc/1999-04n/msg00431.html

We should perhaps let only the machine code verifier worry about these finer
details. EarlyClobber operands are not really interesting to the scavenger.

This fixes PR4528 for the third time.

llvm-svn: 79122

is why they are datarel).  This should fix PR4724, and is fallout
from r78890.

llvm-svn: 79111

llvm-svn: 79107

llvm-svn: 79101

llvm-svn: 79098

PIC16DebugInfo currently rely on NameStr of composite type descriptors to uniquely
identify debug info for two aggregate type decls with same name.
This implementation will change when we have MDNodes based debug info implemenatation in place

llvm-svn: 79097

In a naked function, the flag is never set and getPristineRegs() returns an
empty list. That means naked functions are able to clobber callee saved
registers, but that is the whole point of naked functions.

This fixes PR4716.

llvm-svn: 79096