Commits · aa563df75974aa714270d48fa1b668baf893be0b · Roger Ferrer / llvm-epi-0.8

Oct 17, 2011
- Constraint register class with constrainRegClass() to CSE a virtual into another. rdar://10293289 · aa563df7
  Evan Cheng authored Oct 17, 2011
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llvm-svn: 142234
```
  aa563df7
- Add definitions of conditional moves with 64-bit operands. Comment out code for · a7e0b908
  Akira Hatanaka authored Oct 17, 2011
```
expanding conditional moves, which is not needed since architectures that lack
support for conditional moves have been removed. 

llvm-svn: 142226
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  a7e0b908
- Revert change to function alignment b/c existing logic was fine · 65298576
  Hal Finkel authored Oct 17, 2011
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llvm-svn: 142224
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  65298576
- Removed set, but unused variables. · 34957911
  Chad Rosier authored Oct 17, 2011
```
Patch by Joe Abbey <jabbey@arxan.com>.

llvm-svn: 142223
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  34957911
- Suppress partial retain+release elimination when there's a · 1736c14b
  Dan Gohman authored Oct 17, 2011
```
possibility that it will span multiple CFG diamonds/triangles which
could have different controlling predicates.  rdar://10282956

llvm-svn: 142222
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  1736c14b
- Correct over-zealous removal of hack. · 63a4ea18
  Bill Wendling authored Oct 17, 2011
```
Some code want to check that *any* call within a function has the 'returns
twice' attribute, not just that the current function has one.

llvm-svn: 142221
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  63a4ea18
- Move class and instruction definitions for conditional moves to a seperate file. · 975bfc9b
  Akira Hatanaka authored Oct 17, 2011
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llvm-svn: 142220
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  975bfc9b
- Revert change made in r142205. · 3634f346
  Akira Hatanaka authored Oct 17, 2011
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llvm-svn: 142217
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  3634f346
- Redefine count-leading 0s and 1s instructions. · 33fe8f90
  Akira Hatanaka authored Oct 17, 2011
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llvm-svn: 142216
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  33fe8f90
- Redefine mfhi/lo and mthi/lo instructions. · 8c446be2
  Akira Hatanaka authored Oct 17, 2011
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llvm-svn: 142214
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  8c446be2
- Now that we have the ReturnsTwice function attribute, this method is · 2a83a71c
  Bill Wendling authored Oct 17, 2011
```
obsolete. Check the attribute instead.
<rdar://problem/8031714>

llvm-svn: 142212
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  2a83a71c
- Redefine multiply and divide instructions. · 0317b653
  Akira Hatanaka authored Oct 17, 2011
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llvm-svn: 142211
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  0317b653
- Add definition of a base class for logical shift/rotate instructions with two · 2736bbc0
  Akira Hatanaka authored Oct 17, 2011
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source registers and redefine 32-bit and 64-bit instructions.

llvm-svn: 142210
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  2736bbc0
- Remove >80-col line and unicode · afa70aa2
  Hal Finkel authored Oct 17, 2011
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llvm-svn: 142209
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  afa70aa2
- Add definition of a base class for logical shift/rotate immediate instructions · 73081309
  Akira Hatanaka authored Oct 17, 2011
```
and have 32-bit and 64-bit instructions derive from it.

llvm-svn: 142207
```
  73081309
- Removed set, but unused variable. · c17257c4
  Chad Rosier authored Oct 17, 2011
```
Patch by Joe Abbey <jabbey@arxan.com>.

llvm-svn: 142206
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  c17257c4
- Add definition of immZExt5_64 and redefine immZExt5 as an ImmLeaf. · e3f27b79
  Akira Hatanaka authored Oct 17, 2011
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llvm-svn: 142205
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  e3f27b79
- Fix CMake build. · 0050f596
  Michael J. Spencer authored Oct 17, 2011
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llvm-svn: 142204
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  0050f596
- It is safe to speculate load from GOT. This fixes performance regression caused by r141689. · 69a4565e
  Devang Patel authored Oct 17, 2011
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Radar 10281206.

llvm-svn: 142202
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  69a4565e
- svn mv Target/ARM/ARMGlobalMerge.cpp Transforms/Scalar/GlobalMerge.cpp · 76c85632
  Devang Patel authored Oct 17, 2011
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There is no reason to have simple IR level pass in lib/Target.

llvm-svn: 142200
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  76c85632
- Instructions for Book E PPC should be word aligned, set function alignment to reflect this · 0ade47ac
  Hal Finkel authored Oct 17, 2011
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llvm-svn: 142194
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  0ade47ac
- Don't use inline assembly in 64-bit Visual Studio. Unfortunately, this means... · e20793a4
  Craig Topper authored Oct 17, 2011
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Don't use inline assembly in 64-bit Visual Studio. Unfortunately, this means that cpuid leaf 7 can't be queried on versions of Visual Studio earlier than VS 2008 SP1. Fixes PR11147.

llvm-svn: 142177
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  e20793a4
- Add comment explaining that the order of processing doesn't matter here. · 26d2780d
  Bill Wendling authored Oct 17, 2011
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llvm-svn: 142176
```
  26d2780d
- Add PPC 440 scheduler and some associated tests (new files) · ad677b64
  Hal Finkel authored Oct 17, 2011
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llvm-svn: 142171
```
  ad677b64
- Add PPC 440 scheduler and some associated tests · 6fa5697a
  Hal Finkel authored Oct 17, 2011
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llvm-svn: 142170
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  6fa5697a
- Add a routine to swap branch instruction operands, and update any · 3e8aa65b
  Chandler Carruth authored Oct 17, 2011
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profile metadata at the same time. Use it to preserve metadata attached
to a branch when re-writing it in InstCombine.

Add metadata to the canonicalize_branch InstCombine test, and check that
it is tranformed correctly.

Reviewed by Nick Lewycky!

llvm-svn: 142168
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  3e8aa65b
- Delete a dead member. Dunno if this was ever used, but the current code · 91f4faf8
  Chandler Carruth authored Oct 16, 2011
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directly manipulates the weights inside of the BranchProbabilityInfo
that is passed in.

llvm-svn: 142163
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  91f4faf8
- Add a proper LLVM banner to this file. · 47e1db1e
  Chandler Carruth authored Oct 16, 2011
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llvm-svn: 142162
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  47e1db1e
Oct 16, 2011
- Enable element promotion type legalization by deafault. · 486ff59a
  Nadav Rotem authored Oct 16, 2011
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Changed tests which assumed that vectors are legalized by widening them.

llvm-svn: 142152
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  486ff59a
- When looking for dependencies on the src pointer, scan the src pointer. Scanning · 0a7e9ccf
  Nick Lewycky authored Oct 16, 2011
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on the memcpy call will pull up other unrelated stuff. Fixes PR11142.

llvm-svn: 142150
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  0a7e9ccf
- Add X86 PEXTR and PDEP instructions. · 96fa5978
  Craig Topper authored Oct 16, 2011
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llvm-svn: 142141
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  96fa5978
- Let printf do the formatting instead aligning strings ourselves. · cc863b2b
  Benjamin Kramer authored Oct 16, 2011
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While at it, merge some format strings.

llvm-svn: 142140
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  cc863b2b
- Twinify better. · cb6b02a0
  Benjamin Kramer authored Oct 16, 2011
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llvm-svn: 142139
```
  cb6b02a0
- Add AsmToken::getEndLoc and use it to add ranges to x86 asm register parsing. · 1930b003
  Benjamin Kramer authored Oct 16, 2011
```
<stdin>:1:12: error: register %rax is only available in 64-bit mode
   incl    %rax
           ^~~~

llvm-svn: 142137
```
  1930b003
- X86AsmParser: Synthesize EndLoc for tokens out of StartLoc + Length and print... · d416bae5
  Benjamin Kramer authored Oct 16, 2011
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X86AsmParser: Synthesize EndLoc for tokens out of StartLoc + Length and print ranges for invalid operands.

<stdin>:1:4: error: invalid instruction mnemonic 'abc'
   abc incl    %edi
   ^~~

llvm-svn: 142135
```
  d416bae5
- PR11143: Save the old diagnostic handler and call it when munging diagnostics for #line directives. · 47f5e30e
  Benjamin Kramer authored Oct 16, 2011
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This reenables proper inline asm diagnostics in clang

llvm-svn: 142132
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  47f5e30e
- Fix a bug in LowerV2I64Splat, which generated a BUILD_VECTOR for which there was · bc25b6eb
  Nadav Rotem authored Oct 16, 2011
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no pattern.

llvm-svn: 142130
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  bc25b6eb
- Add X86 BZHI instruction as well as BMI2 feature detection. · aea148c3
  Craig Topper authored Oct 16, 2011
```
llvm-svn: 142122
```
  aea148c3
- Add X86 INVPCID instruction. Add 32/64-bit predicates to INVEPT, INVVPID,... · 0ae8d4d7
  Craig Topper authored Oct 16, 2011
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Add X86 INVPCID instruction. Add 32/64-bit predicates to INVEPT, INVVPID, VMREAD, and VMWRITE to remove hack from X86RecognizableInstr.

llvm-svn: 142117
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  0ae8d4d7
- Add flags on Thumb2 indexed stores paralleling the flags on the indexed loads. · 434b3bff
  Cameron Zwarich authored Oct 16, 2011
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These missing flags show up as errors when running -verify-coalescing on
test-suite.

llvm-svn: 142111
```
  434b3bff