reachable uses, but there still might be uses in dead blocks.  Use the
standard solution of replacing all the uses with undef.  This is
a rare case because it's very sensitive to phase ordering in SimplifyCFG.

llvm-svn: 127299

* Add tests for VSRI and VSLI.

llvm-svn: 127297

llvm-svn: 127295

llvm-svn: 127294

* Update the NEON shift instruction test to expect what 'as' produces.

llvm-svn: 127293

LiveRangeEdit::eliminateDeadDefs() will eventually be used by coalescing,
splitting, and spilling for dead code elimination. It can delete chains of dead
instructions as long as there are no dependency loops.

llvm-svn: 127287

llvm-svn: 127282

Patch by Olaf Krzikalla!

llvm-svn: 127264

with this before since none of the register tracking or nightly tests
had unschedulable nodes.

This should probably be refixed with a special default Node that just
returns some "don't touch me" values.

Fixes PR9427

llvm-svn: 127263

MSVC 9."

The "fix" was meaningless.

This reverts commit r127245.

llvm-svn: 127260

llvm-svn: 127258

llvm-svn: 127254

Found by inspection.

llvm-svn: 127247

llvm-svn: 127246

llvm-svn: 127245

llvm-svn: 127243

llvm-svn: 127241

llvm-svn: 127220

llvm-svn: 127214

testcases accordingly. Some are currently xfailed and will be filed
as bugs to be fixed or understood.

Performance results:

roughly neutral on SPEC
some micro benchmarks in the llvm suite are up between 100 and 150%, only
a pair of regressions that are due to be investigated

john-the-ripper saw:
10% improvement in traditional DES
8% improvement in BSDI DES
59% improvement in FreeBSD MD5
67% improvement in OpenBSD Blowfish
14% improvement in LM DES

Small compile time impact.

llvm-svn: 127208

This change uses the MaxReorderWindow for both height and depth, which
tends to limit the negative effects of high register pressure.

llvm-svn: 127203

llvm-svn: 127198

llvm-svn: 127197

expand the testing of the narrowing shift right instructions.

No functionality change.

llvm-svn: 127193

llvm-svn: 127192

Radar 9097659

llvm-svn: 127182

llvm-svn: 127181

llvm-svn: 127175

In this case, the value need to be available at the load index instead of the
normal use index.

llvm-svn: 127167

llvm-svn: 127163

This allows LLVM IR using ptx_kernel or ptx_device calling
conventions to be properly printed when emitted in text form.

llvm-svn: 127157

then the result could go either way. If it's provably positive then so is the
srem. Fixes PR9343 #7!

llvm-svn: 127146

llvm-svn: 127140

thing for variables.

llvm-svn: 127138

llvm-svn: 127131

the value splatted into every element. Extend this to getTrue and getFalse which
by providing new overloads that take Types that are either i1 or <N x i1>. Use
it in InstCombine to add vector support to some code, fixing PR8469!

llvm-svn: 127116

llvm-svn: 127114

Disable a couple of experimental heuristics to get the best results from the current implementation of -pre-RA-sched=list-ilp.

llvm-svn: 127113

ARM assembler stuff is crazy: for .setfp positive values of offset corresponds to "add" instruction, not to "sub" as in .pad case

llvm-svn: 127106

In Thumb1 mode the constant might be materialized via the load from constpool. Emit unwinding information in case when this load from constpool is used to change the stack pointer in the prologue.

llvm-svn: 127105