llvm-svn: 115792

fix is trying to accomplish.

This code could still use some polishing.

llvm-svn: 115759

  allow target to correctly compute latency for cases where static scheduling
  itineraries isn't sufficient. e.g. variable_ops instructions such as
  ARM::ldm.
  This also allows target without scheduling itineraries to compute operand
  latencies. e.g. X86 can return (approximated) latencies for high latency
  instructions such as division.
- Compute operand latencies for those defined by load multiple instructions,
  e.g. ldm and those used by store multiple instructions, e.g. stm.

llvm-svn: 115755

source module *and* it must be merged (instead of simply replaced or appended
to), then merge instead of replacing or adding another global.

The ObjC __image_info section was being appended to because of this
failure. This caused a crash because the linker expects the image info section
to be a specific size.

<rdar://problem/8198537>

llvm-svn: 115753

operand kind for immediates.  Use these to define a new BinOpRI
class and switch AND8/16/32ri over to it.  AND64ri32 needs some
more refactoring before it can make the switcheroo.

llvm-svn: 115752

llvm-svn: 115748

that i8 operations are even and i16,i32,i64 operations have a
low opcode bit set (they are odd).

llvm-svn: 115747

llvm-svn: 115745

llvm-svn: 115744

llvm-svn: 115731

drastically reduce the linking time during LTO.

Patch by Shantonu Sen!

llvm-svn: 115728

gunk that goes along with an MVT (e.g. reg class, preferred load operation,
memory operand)

llvm-svn: 115727

that I need a heavier handed approach to get ultimate factorization.

llvm-svn: 115726

where !cast is just as short.

llvm-svn: 115722

  let AsmString = !strconcat(
                     !strconcat(!strconcat(opc, "${p}"), !strconcat(".", dt)),
                     !strconcat("\t", asm));

with:

  let AsmString = !strconcat(opc, "${p}", ".", dt, "\t", asm);

:)

llvm-svn: 115720

!strconcat(!strconcat(!strconcat(!strconcat

Simplify some x86 td files to use it.

llvm-svn: 115719

section. Common because of linkonce sections.

llvm-svn: 115718

llvm-svn: 115717

register class, and use this to simplify use of BinOpRR.

llvm-svn: 115716

llvm-svn: 115715

32-bit fp reg, not 64-bit.

Fixes SingleSource.

llvm-svn: 115711

llvm-svn: 115710

reusable, but that is no longer relevant since a split will always replace the
original.

llvm-svn: 115709

llvm-svn: 115708

convert all the rest of the cmovs to the multiclass,
with good results:

 X86InstrCMovSetCC.td |  598 +--------------------------------------------------
 X86InstrCompiler.td  |   61 +++++
 2 files changed, 77 insertions(+), 582 deletions(-)

llvm-svn: 115707

(e.g. CMOVBE16rr instead of CMOVBErr16).

llvm-svn: 115705

Another step towards getting rid of static ctors for pass registration: have INITIALIZE_PASS AND INITIALIZE_AG_PASS
expand to an initializeMyPass() function (in additional to the extant static ctors).  Eventually, these will be called
from a big InitializeAllPasses() function, and the PassInfo's they create (which would be leaked if this code were used
at the moment) will be handed off to a PassRegistry for ownership.

llvm-svn: 115703

simplify the X86 CMOVmr's.

llvm-svn: 115702

and verbosity

llvm-svn: 115701

llvm-svn: 115699

21 insertions(+), 53 deletions(-)

Moar change coming before I switch the rest.

llvm-svn: 115697

llvm-svn: 115696

never kept after splitting.

Keeping the original interval made sense when the split region doesn't modify
the register, and the original is spilled. We can get the same effect by
detecting reloaded values when spilling around copies.

llvm-svn: 115695

llvm-svn: 115694

not getting marked as mayStore.  This fixes llvm-gcc bootstrap.

llvm-svn: 115693

llvm-svn: 115692

 X86InstrCMovSetCC.td |  200 ++++++---------------------------------------------
 1 file changed, 27 insertions(+), 173 deletions(-)

llvm-svn: 115689

llvm-svn: 115687

llvm-svn: 115686

gross hack (having the asmmatcher handle the alias).

llvm-svn: 115685