interfere.  Because these intervals have a single definition, and one of them
is a copy instruction, they are always safe to merge even if their lifetimes
interfere.  This slightly reduces the amount of spill code, for example on
252.eon, from:

 12837 spiller               - Number of loads added
  7604 spiller               - Number of stores added
  5842 spiller               - Number of register spills
 18155 liveintervals         - Number of identity moves eliminated after coalescing

to:

  12754 spiller               - Number of loads added
   7585 spiller               - Number of stores added
   5803 spiller               - Number of register spills
  18262 liveintervals         - Number of identity moves eliminated after coalescing

The much much bigger win would be to merge intervals with multiple definitions
(aka phi nodes) but this is not that day.

llvm-svn: 15124

llvm-svn: 15115

intervals need not be sorted anymore. Removing this redundant step
improves LiveIntervals running time by 5% on 176.gcc.

llvm-svn: 15106

fortunately, they are easy to handle if we know about them.  This patch fixes
some serious pessimization of code produced by the linscan register allocator.

llvm-svn: 15092

llvm-svn: 15089

llvm-svn: 15031

llvm-svn: 15005

is a simple change, but seems to improve code a little.  For example, on
256.bzip2, we went from 75.0s -> 73.33s (2% speedup).

llvm-svn: 15004

llvm-svn: 15003

ask instructions for their parent.

llvm-svn: 14998

llvm-svn: 14997

* vreg <-> vreg joining now works, enable it unconditionally when joining
  is enabled (which is the default).
* Fix a serious pessimization of spill code where we were saying that a
  spilled DEF operand was live into the subsequent instruction.  This allows
  for substantially better code when spilling starts to happen.

llvm-svn: 14993

order, causing the inactive list in the linearscan list to get unsorted, which
basically fuxored everything up severely.

These seems to fix the joiner, so with more testing I will enable it by default.

llvm-svn: 14992

Heavily refactor handleVirtualRegisterDef, adding comments and making it more
efficient.  It is also much easier to follow and convince ones self that it is
correct :)

Add -debug output to the joine, showing the result of joining the intervals.

llvm-svn: 14989

but make virtreg->virtreg joining stay off by default

llvm-svn: 14916

llvm-svn: 14720

llvm-svn: 14719

llvm-svn: 14655

classes: just ignore that move. Thanks to Vladimir Prus who found the
bug!

llvm-svn: 14644

don't exist, we don't have to pretend to handle them.

llvm-svn: 14567

use them instead of a local LiveVariables numbering

llvm-svn: 14523

map.

llvm-svn: 14518

llvm-svn: 14475

llvm-svn: 14474

Made a fix so that you can print out MachineInstrs that belong to a MachineBasicBlock that is not yet attached to a MachineFunction. This change includes changing the third operand (TargetMachine) to a pointer for the MachineInstr::print function.

llvm-svn: 14389

existing llvm::Interval class.

Patch contributed by Vladimir Prus!
http://mail.cs.uiuc.edu/pipermail/llvmbugs/2004-June/000710.html

llvm-svn: 14281

llvm-svn: 13956

llvm-svn: 13910

spills. This allows for more flexibility when allocating registers for
spill code.

llvm-svn: 13907

llvm-svn: 13892

llvm-svn: 13416

workaround, use the C HUGE_VAL macro instead.

llvm-svn: 13377

llvm-svn: 13302

llvm-svn: 12872

llvm-svn: 12869

llvm-svn: 12866

llvm-svn: 12791

instruction to make the API more flexible.

llvm-svn: 12386

llvm-svn: 12058

MRegisterInfo::is{Physical,Virtual}Register. Apply appropriate fixes
to relevant files.

llvm-svn: 11882