is more familiar with CMake please review?

llvm-svn: 115391

llvm-svn: 115390

where both symbols are "local", that is non-external symbols, and there is
no "base" for the symbols used in the expression, that is the section has
no non-temporary symbols.  This case looks like this:

% cat local_reloc_A-B.s
	.long 0
LB:	.long 1
	.long LA - LB - 4
	.long 2
LA:	.long 3

which llvm-mc will not encode without this patch, generates a "unsupported
local relocations in difference" error, but the Darwin assembler will
encode with relocation entries like this:

% otool -rv a.out l.out 
a.out:
Relocation information (__TEXT,__text) 2 entries
address  pcrel length extern type    scattered symbolnum/value
00000008 False long   False  SUB     False     1 (__TEXT,__text)
00000008 False long   False  UNSIGND False     1 (__TEXT,__text)

which is very similar to what is encoded when the symbols don't have the
leading 'L' and they are not temporary symbols.  Which llvm-mc and the
Darwin assembler will encoded like this:

Relocation information (__TEXT,__text) 2 entries
address  pcrel length extern type    scattered symbolnum/value
00000008 False long   True   SUB     False     B
00000008 False long   True   UNSIGND False     A

This is the missing relocation encoding needed to allow the Mach-O x86
Dwarf file and line table to be emitted.  So this patch also removes the
TODO from the if() statement in MCMachOStreamer::Finish() that didn't 
call MCDwarfFileTable::Emit() for 64-bit targets.

llvm-svn: 115389

RemoveCopyByCommutingDef.

llvm-svn: 115386

LiveInterval::MergeValueNumberInto instead of trying to extend LiveRanges and
getting it wrong.

This fixed PR8249 where a valno with a multi-segment live range was defined by
an identity copy created by RemoveCopyByCommutingDef. Some of the live
segments disappeared.

llvm-svn: 115385

llvm-svn: 115384

llvm-svn: 115378

llvm-svn: 115377

llvm-svn: 115376

llvm-svn: 115375

llvm-svn: 115373

llvm-svn: 115370

'InstPrinter' to fall into line with the other MC-ized assembly printer
using targets.

llvm-svn: 115367

llvm-svn: 115365

Thread the determination of branch prediction hit rates back through the if-conversion heuristic APIs.  For now,
stick with a constant estimate of 90% (branch predictors are good!), but we might find that we want to provide
more nuanced estimates in the future.

llvm-svn: 115364

InstPrinter) subdir

llvm-svn: 115363

llvm-svn: 115362

been MC-ized for assembly printing. MSP430 is mostly so, but still has the
asm printer and lowering code in the printer subdir for the moment.

llvm-svn: 115360

delay. Anton and PIC16 folks, if this is still good to keep, please go ahead
and add it back in with an updated comment about when would be a good time
to revisit.

llvm-svn: 115358

llvm-svn: 115354

llvm-svn: 115353

Need to specify SSE4 for machines which don't have SSE4. The code checked for is generated by SSE4. Otherwise, we get something else.

llvm-svn: 115352

llvm-svn: 115350

llvm-svn: 115348

llvm-svn: 115344

llvm-svn: 115342

Make the spelling of the flags for old-style if-conversion heuristics consistent between ARM and Thumb2.

llvm-svn: 115341

llvm-svn: 115339

Now that the profitable bits of EnableFullLoadPRE have been enabled by default, rip out the remainder.
Anyone interested in more general PRE would be better served by implementing it separately, to get real
anticipation calculation, etc.

llvm-svn: 115337

Per Cortex-A9 pipeline diagram. AGU (core load / store issue) and NEON/FP issue are multiplexed. Model it correctly.

llvm-svn: 115332

llvm-svn: 115326

llvm-svn: 115325

Fix code gen crash reported in PR 8235. We still lose debug info for the unused argument here. This is a known limitation recorded debuginfo-tests/trunk/dbg-declare2.ll function 'f6' test case.

llvm-svn: 115323

llvm-svn: 115314

llvm-svn: 115311

llvm-svn: 115310

llvm-svn: 115309

llvm-svn: 115308

llvm-svn: 115307

Also remove some code that died in the process.
One now non-existant ori is checked for.

llvm-svn: 115306