beneficial cases. See the changes in test/CodeGen/X86/tail-opts.ll and
test/CodeGen/ARM/ifcvt2.ll for details.

The fix is to change HashEndOfMBB to hash at most one instruction,
instead of trying to apply heuristics about when it will be profitable to
consider more than one instruction. The regular tail-merging heuristics
are already prepared to handle the same cases, and they're more precise.

Also, make test/CodeGen/ARM/ifcvt5.ll and
test/CodeGen/Thumb2/thumb2-branch.ll slightly more complex so that they
continue to test what they're intended to test.

And, this eliminates the problem in
test/CodeGen/Thumb2/2009-10-15-ITBlockBranch.ll, the testcase from
PR5204. Update it accordingly.

llvm-svn: 102907

preventing the emission of the NOP on Darwin for a
function with no actual code.  From timberwolfmc
with TEST=optllcdbg.

llvm-svn: 102843

when needed. This fixes PR7001

llvm-svn: 102838

handles argument lowering anyway, so there's no need for special
casing here.

llvm-svn: 102828

llvm-svn: 102826

try to put a kill flag on a DBG_INFO instruction.

llvm-svn: 102820

Seen in SingleSrc/Benchmarks/Misc/flops with TEST=optllcdbg.
7929951.

llvm-svn: 102819

llvm-svn: 102817

modified.

llvm-svn: 102816

code, and to eliminate the need for the SelectionDAGBuilder
state to be live during CodeGenAndEmitDAG calls.

Call SDB->clear() before CodeGenAndEmitDAG calls instead of
before it, and move the CurDAG->clear() out of SelectionDAGBuilder,
which doesn't own the DAG, and into CodeGenAndEmitDAG.

llvm-svn: 102814

llvm-svn: 102810

changes before doing phi lowering for switches.

llvm-svn: 102809

indexes could be of a different value type. Or not even using the same SDNode
for the constant (weird, I know). Compare the actual values instead of the
pointers.

llvm-svn: 102791

instruction selection is done; it's confusing to see parts of it printed,
while other parts are omitted, along the way.

llvm-svn: 102771

call that might throw. The landing pad assumes that all registers are in stack
slots.

We used to spill those dirty CSRs after the call, and the stack slots would be
wrong when arriving at the landing pad.

llvm-svn: 102770

llvm-svn: 102743

llvm-svn: 102742

Rounding differences causes tests to fail on Linux.

llvm-svn: 102729

comparisons sign-extended to a different bitwidth than the
comparison operands.

llvm-svn: 102721

llvm-svn: 102680

easy cases.

llvm-svn: 102678

of different register classes. e.g.

  %reg1048:3<def> = EXTRACT_SUBREG %RAX<kill>, 3

Where %reg1048 is a GR32 register. This is not impossible to handle, but it is
pretty hard and very rare.

This should unbreak the dragonegg builder.

llvm-svn: 102672

llvm-svn: 102666

llvm-svn: 102663

llvm-svn: 102661

llvm-svn: 102657

	##DEBUG_VALUE: runOnMachineFunction:this <- RDI+0
	##DEBUG_VALUE: runOnMachineFunction:fn <- RSI+0
	##DEBUG_VALUE: DeadDefs <- undef ## SimpleRegisterCoalescing.cpp:2706
	##DEBUG_VALUE: getRegInfo:this <- [%rsp+$56]+$0
	##DEBUG_VALUE: getTarget:this <- [%rsp+$56]+$0

llvm-svn: 102655

llvm-svn: 102654

llvm-svn: 102653

llvm-svn: 102606

llvm-svn: 102602

llvm-svn: 102590

llvm-svn: 102585

llvm-svn: 102584

llvm-svn: 102581

llvm-svn: 102573

- Also, update dbg_value is the value is being re-matted from a frame slot, e.g. fixed slots for arguments.

llvm-svn: 102565

llvm-svn: 102558

Replace r102368 with code that's less fragile. This creates DBG_VALUE instructions for function arguments early and insert them after instruction selection is done.

llvm-svn: 102554

Before:
DBG_VALUE %RSI, 0, !-1; dbg:SimpleRegisterCoalescing.cpp:2707
Now:
DBG_VALUE %RSI, 0, !"this"; dbg:SimpleRegisterCoalescing.cpp:2707

llvm-svn: 102518