Explicitly zero out parts of a vector which are required to be zero by the algorithm in LowerUINT_TO_FP_i32.  This only has a substantial effect on the generated code when the input is extracted from a vector register; other ways of loading an i32 do the appropriate zeroing implicitly.  Fixes PR10802.

llvm-svn: 138768

Apply the same fix for the change in LDR_PRE_IMM/LDRB_PRE_IMM operand encodings to the load-store optimizer that I applied to the instruction selector in r138758.  Fixes ary3 from the nightly test suite.

llvm-svn: 138766

llvm-svn: 138764

llvm-svn: 138760

addrmode_imm12 and addrmode2_offset encode their immediate values differently.  Update the manual instruction selection code that was encoding them the addrmode2 way even though LDR_PRE_IMM/LDRB_PRE_IMM had switched to addrmode_imm12.  Should fix a number of nightly test failures.

llvm-svn: 138758

Optimize chained bitcasts of the form A->B->A.
Undo r138722 and change isEliminableCastPair to allow this case.

llvm-svn: 138756

llvm-svn: 138754

llvm-svn: 138752

llvm-svn: 138751

llvm-svn: 138749

llvm-svn: 138748

Update the load-store optimizer for changes to the operands on LDR_PRE_IMM and LDRB_PRE_IMM in r138653.

llvm-svn: 138746

llvm-svn: 138744

Add support for parsing #-0 on non-memory-operand immediate values, and add a testcase that necessitates it.

llvm-svn: 138739

Patch by Xiaoyi Guo!

llvm-svn: 138737

Submitted by: Villmow, Micah <Micah.Villmow@amd.com>

llvm-svn: 138734

llvm-svn: 138725

when outputting them.  With this, the entire LLVM testsuite
passes when built with dragonegg.

llvm-svn: 138724

llvm-svn: 138723

llvm-svn: 138722

non-deterministic crash in the test suite. Fixes PR10055!

llvm-svn: 138717

llvm-svn: 138706

Before we just left the remaining bytes uninitialized. This is another step in making llvm valgrind-clean again.

llvm-svn: 138705

things to disasterously over night, this can be reverted.

llvm-svn: 138702

llvm-svn: 138701

llvm-svn: 138700

llvm-svn: 138697

Patch by Xiaoyi Guo!

llvm-svn: 138695

Improve encoding support for BLX with immediat eoperands, and fix a BLX decoding bug this uncovered.

llvm-svn: 138675

llvm-svn: 138673

llvm-svn: 138669

llvm-svn: 138667

This handles only the handling of the IT instruction itself, not the
processing and validation of the instructions in the IT block. That's next,
and will include encoding tests for IT itself.

llvm-svn: 138665

llvm-svn: 138664

llvm-svn: 138660

split it in the other place where we're splitting critical edges.

llvm-svn: 138658

llvm-svn: 138657

llvm-svn: 138654

invalid-LDR_PRE-arm.txt was already passing, but for the wrong reasons.  We were failing to specify enough fixed bits of LDR_PRE/LDRB_PRE, resulting in decoding conflicts.  Separate them into immediate vs. register versions, allowing us to specify the necessary fixed bits.  This in turn results in the test being decoded properly, and being rejected as UNPREDICTABLE rather than a hard failure.

llvm-svn: 138653

llvm-svn: 138651