Verify that early clobber registers and their aliases are not used.

All changes to RegsAvailable are now done as a transaction so the order of
operands makes no difference.

The included test case is from PR4686. It has behaviour that was dependent on the order of operands.

llvm-svn: 78465

llvm-svn: 78464

llvm-svn: 78463

llvm-svn: 78462

 - This doesn't actually improve the algorithm (its still linear), but the
   generated (match) code is now fairly compact and table driven. Still need a
   generic string matcher.

 - The table still needs to be compressed, this is quite simple to do and should
   shrink it to under 16k.

 - This also simplifies and restructures the code to make the match classes more
   explicit, in anticipation of resolving ambiguities.

llvm-svn: 78461

so I generalized the class for VTRN in the .td file to handle all 3 of them.

llvm-svn: 78460

directly from the intrinsics produced by the frontend.  If it is more
convenient to have a custom DAG node for using these to implement shuffles,
we can add that later.

llvm-svn: 78459

so that terminal states are as simple as possible.
 - If we were willing to assume that the order that operands get inserted in the
   MCInst is fixed we could actually dispose with this altogether, although it
   might be nice to have the flexibility to change it later.

llvm-svn: 78458

llvm-svn: 78457

llvm-svn: 78456

llvm-svn: 78455

llvm-svn: 78454

llvm-svn: 78453

llvm-svn: 78452

llvm-svn: 78451

to allow sharing of nodes. Simplifies some aspects of template
instantiation, and fixes both PR3444 and <rdar://problem/6757457>.

llvm-svn: 78450

error condition get trapped with an assert.

llvm-svn: 78449

llvm-svn: 78448

llvm-svn: 78447

llvm-svn: 78446

non-trivial copy constructors.

llvm-svn: 78445

llvm-svn: 78444

llvm-svn: 78443

llvm-svn: 78441

is more tolerant of whitespace differences.

llvm-svn: 78439

as vector shuffles did not work out well.  Shuffles that produce double-wide
vectors accurately represent the operation but make it hard to do anything
with the results.  I considered splitting them up into 2 shuffles, one to
write each register separately, but there doesn't seem to be a good way to
reunite them for codegen.

llvm-svn: 78437

copying non-virtual base classes which have non-trivial
constructor. Work in progress.

llvm-svn: 78436

This:
--
#undef DEBUG_TYPE
#define DEBUG_TYPE "foo"
DEBUG(...)
#undef DEBUG_TYPE
#define DEBUG_TYPE ""
--
becomes this:
--
DEBUG_WITH_TYPE("foo", ...)
--

llvm-svn: 78435

llvm-svn: 78434

llvm-svn: 78433

llvm-svn: 78432

llvm-svn: 78431

llvm-svn: 78430

llvm-svn: 78429

llvm-svn: 78428

driven by TAI to being static, driven by tblgen.  This means that a
target doesn't get impacted by this stuff at all if it doesn't opt
into it.

llvm-svn: 78427

llvm-svn: 78426

llvm-svn: 78425

The use case is if you have a wrapper class:

class Base {
  void *Ptr;
public:
  Base() : Ptr(0) { }
  operator bool() const { return Ptr; }
.....
}

and sub-wrappers that have exactly the same size:

class Sub : public Base {
public:
....
static bool classof(const Base*);
}

and in the code you would do:

void f(Base b) {
  Sub sub = dyn_cast<Sub>(b);
  if (sub) {
    ....
  }
}

llvm-svn: 78424

I can clean this up a bit more and do way with the TheCondState and just use
the top element on the TheCondStack if not empty.  Also may tweak the code
around ParseConditionalAssemblyDirectives() to simplify the AsmParser code.

llvm-svn: 78423