To do this it is necessary to add a "always inline" argument to the
memcpy node. For completeness I have also added this node to memmove
and memset.  I have also added getMem* functions, because the extra
argument makes it cumbersome to use getNode and because I get confused
by it :-)

llvm-svn: 43172

- Added getOpcodeAfterMemoryUnfold(). It doesn't unfold an instruction, but only returns the opcode of the instruction post unfolding.
- Fix some copy+paste bugs.

llvm-svn: 43153

llvm-svn: 43150

llvm-svn: 43144

loads instead of 1 x i64 loads.  This doesn't change any functionality yet.

llvm-svn: 43068

llvm-svn: 43066

llvm-svn: 43033

was stored to the acutal stack slot before the parameters were
lowered to their stack slot. This could cause arguments to be
overwritten by the return address if the called function had less
parameters than the caller function. The update should remove the
last failing test case of llc-beta: SPASS.

llvm-svn: 43027

llvm-svn: 43004

llvm-svn: 42962

llvm-svn: 42960

trampolines, rather than with nested functions themselves.

llvm-svn: 42955

register used by the unfolded instructions. User can also specify whether to
unfold the load, the store, or both.

llvm-svn: 42946

llvm-svn: 42935

for fastcc from X86CallingConv.td.  This means that nested functions
are not supported for calling convention 'fastcc'.

llvm-svn: 42934

longer be created for fastcc functions.

llvm-svn: 42925

llvm-svn: 42922

function symbol name instead of a codegen-assigned function
number.

Thanks Evan! :-)

llvm-svn: 42908

llvm-svn: 42905

llvm-svn: 42895

llvm-svn: 42894

llvm-svn: 42881

llvm-svn: 42874

enabled by passing -tailcallopt to llc.  The optimization is
performed if the following conditions are satisfied:
* caller/callee are fastcc
* elf/pic is disabled OR
  elf/pic enabled + callee is in module + callee has
  visibility protected or hidden

llvm-svn: 42870

llvm-svn: 42787

llvm-svn: 42786

llvm-svn: 42785

llvm-svn: 42783

llvm-svn: 42774

use ISD::{S,U}DIVREM and ISD::{S,U}MUL_HIO. Move the lowering code
associated with these operators into target-independent in LegalizeDAG.cpp
and TargetLowering.cpp.

llvm-svn: 42762

llvm-svn: 42761

llvm-svn: 42739

llvm-svn: 42738

llvm-svn: 42700

llvm-svn: 42699

(vextract (v4f32 s2v (f32 load $addr)), 0) -> (f32 load $addr) 
(vextract (v4i32 bc (v4f32 s2v (f32 load $addr))), 0) -> (i32 load $addr)
Remove x86 specific patterns.

llvm-svn: 42677

to its inverse.
Testing this as llcbeta

llvm-svn: 42661

llvm-svn: 42656

llvm-svn: 42655

cause performance degradation.

llvm-svn: 42653