The post-ra scheduler was explicitly updating the depth of a node's
successors after scheduling it, regardless of whether the successor
was ready. This is quadratic for DAGs with transitively redundant
edges. I simply removed the useless update of depth, which is lazilly
computed later.
Fixes <rdar://problem/9044332> compiler takes way too long to build TextInput.

llvm-svn: 130992

Move CompileUnit::getOrCreateNameSpace() and CompileUnit::addPubType() from DwarfDebug.cpp to DwarfCompileUnit.cpp

llvm-svn: 130991

llvm-svn: 130989

llvm-svn: 130988

llvm-svn: 130987

llvm-svn: 130985

llvm-svn: 130984

Patch by Wei-Ren Chen

llvm-svn: 130980

return the pointer being dereferenced, it returns the pointee, but a call
might return the pointer itself.

llvm-svn: 130979

possibly related to cbnz formation.

llvm-svn: 130977

llvm-svn: 130967

llvm-svn: 130964

llvm-svn: 130959

llvm-svn: 130957

llvm-svn: 130955

PR9838: Fix transform introduced in r127064 to not trigger when only one side of the icmp is an exact shift.

llvm-svn: 130954

llvm-svn: 130951

llvm-svn: 130947

llvm-svn: 130944

BuildSchedGraph was quadratic in the number of calls in the basic
block. After this fix, it keeps only a single call at the top of the
DefList so compile time doesn't blow up on large blocks. This reduces
postRA sched time on an external test case from 81s to 0.3s.  Although
r130800 (reduced ARM register alias defs) also partially fixes the
issue by reducing the constant overhead of checking call interference
by an order of magnitude.

Fixes <rdar://problem/7662664> very poor compile time with post RA scheduling.

llvm-svn: 130943

llvm-svn: 130942

I tested both gdb on a bootstrapped clang and and the gdb testsuite on OS X (snow leopard)
and both are happy using __eh_frame.

llvm-svn: 130937

llvm-svn: 130934

llvm-svn: 130933

No test because I can't think of any way to write one that won't break quickly.

llvm-svn: 130932

llvm-svn: 130931

Avoid extra vreg copies for arguments passed in registers.  Specifically, this can make MachineCSE more effective in some cases (especially in small functions).  PR8361 / part of rdar://problem/8259436 .

llvm-svn: 130928

llvm-svn: 130926

llvm-svn: 130925

llvm-svn: 130920

who used this flag, and it now emits CFI and doesn't emit this anymore. All
other targets left this flag "false".
<rdar://problem/8486371>

llvm-svn: 130918

crash.

llvm-svn: 130911

llvm-svn: 130903

filename.

llvm-svn: 130897

Joining physregs is inherently dangerous because it uses a heuristic to avoid
creating invalid code. Linear scan had an emergency spilling mechanism to deal
with those rare cases. The new greedy allocator does not.

The greedy register allocator is much better at taking hints, so this has almost
no impact on code size and quality. The few cases where it matters show up as
unit tests that now have -join-physregs enabled explicitly.

llvm-svn: 130896

llvm-svn: 130895

llvm-svn: 130894

It is OK for B to be any GR8_ABCD_H superclass, the returned register class
doesn't have to map surjectively onto B.

llvm-svn: 130892

landing pad as its successor.

SjLj exception handling jumps to the correct landing pad via a switch statement
that's generated right before code-gen. Loosen the constraint in the machine
instruction verifier to allow for this. Note, this isn't the most rigorous check
since we cannot determine where that switch statement came from. But it's
marginally better than turning this check off when SjLj exceptions are used.
<rdar://problem/9187612>

llvm-svn: 130881

llvm-svn: 130880