In collaboration with Adhemerval Zanella.

llvm-svn: 162562

llvm-svn: 162446

llvm-svn: 162362

within the codegen EK_GPRel64BlockAddress. This was not 
supported for direct object output and resulted in an assertion.

This change adds support for EK_GPRel64BlockAddress for 
direct object.

One fallout from this is to turn on rela relocations 
for mips64 to match gas.

llvm-svn: 162334

on a patch by Andy/PaX. I added the support for dot and dollar.

llvm-svn: 162298

consistent with the other "expected identifier" errors.
Extracted from the Andy/PaX patch. I added the test.

llvm-svn: 162291

llvm-svn: 162283

llvm-svn: 162282

llvm-svn: 162281

of the range. Fixes PR13581!

llvm-svn: 161739

These functions are very generic. There's no reason for them to
be tied to MCObjectWriter.

llvm-svn: 161545

Committing it first as it makes the "real" patch a lot easier to read.

llvm-svn: 161491

Patch by kai@redstar.de !

llvm-svn: 161487

There are situations where inline ASM may want to change the section -- for
instance, to create a variable in the .data section. However, it cannot do this
without (potentially) restoring to the wrong section. E.g.:

  asm volatile (".section __DATA, __data\n\t"
                ".globl _fnord\n\t"
                "_fnord: .quad 1f\n\t"
                ".text\n\t"
                "1:" :::);

This may be wrong if this is inlined into a function that has a "section"
attribute. The user should use `.pushsection' and `.popsection' here instead.

The addition of `.previous' is added for completeness.
<rdar://problem/12048387>

llvm-svn: 161477

Empty macro arguments at the end of the list should be as-if not specified at
all, but those in the middle of the list need to be kept so as not to screw
up the positional numbering. E.g.:
.macro foo
foo_-bash___:
  nop
.endm

foo 1, 2, 3, 4
foo 1, , 3, 4

Should create two labels, "foo_1_2_3_4" and "foo_1__3_4".

rdar://11948769

llvm-svn: 161002

Move some functions from MCRegisterInfo.h that don't need to be inline.

This shrinks llc by 8K.

llvm-svn: 160865

llvm-svn: 160621

Test case will be added later when long branch patch is checked in.

llvm-svn: 160597

llvm-svn: 160475

llvm-svn: 160445

subtarget CPU descriptions and support new features of
MachineScheduler.

MachineModel has three categories of data:
1) Basic properties for coarse grained instruction cost model.
2) Scheduler Read/Write resources for simple per-opcode and operand cost model (TBD).
3) Instruction itineraties for detailed per-cycle reservation tables.

These will all live side-by-side. Any subtarget can use any
combination of them. Instruction itineraries will not change in the
near term. In the long run, I expect them to only be relevant for
in-order VLIW machines that have complex contraints and require a
precise scheduling/bundling model. Once itineraries are only actively
used by VLIW-ish targets, they could be replaced by something more
appropriate for those targets.

This tablegen backend rewrite sets things up for introducing
MachineModel type #2: per opcode/operand cost model.

llvm-svn: 159891

llvm-svn: 159889

AsmParser::ParseStatement.

Patch by Vladimir Medic.

llvm-svn: 159768

llvm-svn: 159645

It fixes failure in test/MC/MachO/gen-dwarf.s on Win32 w/o bash.

llvm-svn: 159640

which many Mips 64 ABIs use than for O64 which many 
if not all other target ABIs use.

Most architectures have the following 64 bit relocation record format:

  typedef struct
  {
    Elf64_Addr   r_offset; /* Address of reference */
    Elf64_Xword  r_info;   /* Symbol index and type of relocation */
  } Elf64_Rel;

  typedef struct
  {
    Elf64_Addr    r_offset;
    Elf64_Xword   r_info;
    Elf64_Sxword  r_addend;
  } Elf64_Rela;

Whereas N64 has the following format:

  typedef struct
  {
    Elf64_Addr    r_offset;/* Address of reference */
    Elf64_Word  r_sym;     /* Symbol index */
    Elf64_Byte  r_ssym;    /* Special symbol */
    Elf64_Byte  r_type3;   /* Relocation type */
    Elf64_Byte  r_type2;   /* Relocation type */
    Elf64_Byte  r_type;    /* Relocation type */
  } Elf64_Rel;

  typedef struct
  {
    Elf64_Addr    r_offset;/* Address of reference */
    Elf64_Word  r_sym;     /* Symbol index */
    Elf64_Byte  r_ssym;    /* Special symbol */
    Elf64_Byte  r_type3;   /* Relocation type */
    Elf64_Byte  r_type2;   /* Relocation type */
    Elf64_Byte  r_type;    /* Relocation type */
    Elf64_Sxword  r_addend;
  } Elf64_Rela;

The structure is the same size, but the r_info data element 
is now 5 separate elements. Besides the content aspects, 
endian byte reordering will be different for the area with 
each element being endianized separately.

I treat this as generic and continue to pass r_type as 
an integer masking and unmasking the byte sized N64 
values for N64 mode. I've implemented this and it causes no 
affect on other current targets.

This passes make check.

Jack

llvm-svn: 159299

EmitZerofill should take a 64-bit size or else it's chopping off large zero-filled global. rdar://11729134

llvm-svn: 159023

knows dwarf or not.

llvm-svn: 158993

DwarfUsesRelocationsAcrossSections.

llvm-svn: 158992

a recommit of r127757. Fixes PR9493. Patch by Paul Robinson!

llvm-svn: 158957

llvm-svn: 158604

Patch extracted from a larger one by the PaX team. I added the testcases
and tightened error handling a bit.

llvm-svn: 158523

LLVM should be -Wunused-private-field clean now.

llvm-svn: 158103

This allows a subtarget to explicitly specify the issue width and
other properties without providing pipeline stage details for every
instruction.

llvm-svn: 157979

llvm-svn: 157935

vector. No functionality change.
Extracted from a patch by the PaX Team.

llvm-svn: 157909

Part of a patch by the PaX Team.

llvm-svn: 157908

llvm-svn: 157885

llvm-svn: 157726

Store (debugging) register names as offsets into a string table instead
of as char pointers.

llvm-svn: 157449