[Sparc] Emit retl/ret instead of jmp instruction. It improves the readability of the assembly generated.

llvm-svn: 198910

[Sparc] Add support for parsing jmpl instruction and make indirect call and jmp instructions as aliases to jmpl.

llvm-svn: 198909

llvm-svn: 198893

llvm-svn: 198740

llvm-svn: 198739

llvm-svn: 198738

This makes it available to tools that don't link with target (like llvm-ar).

llvm-svn: 198708

subsequent changes are easier to review. About to fix some layering
issues, and wanted to separate out the necessary churn.

Also comment and sink the include of "Windows.h" in three .inc files to
match the usage in Memory.inc.

llvm-svn: 198685

Also, correct the offsets for FixupsKindInfo.

llvm-svn: 198681

llvm-svn: 198658

llvm-svn: 198592

llvm-svn: 198591

llvm-svn: 198585

llvm-svn: 198580

This moves the check up into the parent class so that all targets can use it
without having to copy (and keep in sync) the same error message.

llvm-svn: 198579

llvm-svn: 198567

llvm-svn: 198533

__builtin_returnaddress requires that the value passed into is be a constant.
However, at -O0 even a constant expression may not be converted to a constant.
Emit an error message intead of crashing.

llvm-svn: 198531

llvm-svn: 198484

Fixes PR18356.

llvm-svn: 198480

Before this patch any program that wanted to know the final symbol name of a
GlobalValue had to link with Target.

This patch implements a compromise solution where the mangler uses DataLayout.
This way, any tool that already links with Target (llc, clang) gets the exact
behavior as before and new IR files can be mangled without linking with Target.

With this patch the mangler is constructed with just a DataLayout and DataLayout
is extended to include the information the Mangler needs.

llvm-svn: 198438

llvm-svn: 198286

llvm-svn: 198281

[SparcV9]: Use SRL instead of SLL to clear top 32-bits in ctpop:i32. SLL does not clear top 32 bit, only SRL does.

llvm-svn: 198280

[SparcV9] Use separate instruction patterns for 64 bit arithmetic instructions instead of reusing 32 bit instruction patterns.
 This is done to avoid spilling the result of the 64-bit instructions to a 4-byte slot.

llvm-svn: 198157

[SparcV9] For codegen generated library calls that return float, set inreg flag manually in LowerCall().
 This makes the sparc backend to generate Sparc64 ABI compliant code.

llvm-svn: 198149

Also, pass fp128 arguments to varargs through integer registers if necessary.

llvm-svn: 198145

llvm-svn: 198030

llvm-svn: 198029

llvm-svn: 198028

This matches the data in clang which was added by Jakob Stoklund Olesen in
r179596.

Thanks for erikjv on irc for pointing me to the relevant documents:
http://sparc.com/standards/64.psabi.1.35.ps.Z
page 25: Every stack frame must be 16-byte aligned.

http://sparc.com/standards/psABI3rd.pdf
page 3-10: Although the architecture requires only word alignment, software convention and the operating system require every stack frame to be doubleword aligned.

I tried to add a test, but it looks like sparc doesn't implement dynamic stack
realignment. This will be tested in clang shortly.

llvm-svn: 197646

llvm-svn: 197400

llvm-svn: 197397

llvm-svn: 197249

llvm-svn: 196990

llvm-svn: 196988

llvm-svn: 196755

[Sparc]: Implement getSetCCResultType() in SparcTargetLowering so that umulo/smulo can be lowered on sparcv9 without an assertion error.

llvm-svn: 196751

  This fixes PR18150.

llvm-svn: 196735

No functionality change.

llvm-svn: 196170