should use CreateTempSymbol() if they don't care about the
name.

llvm-svn: 98712

llvm-svn: 98692

optional register update argument, which is currently unused -- when we add
support for that, it can just be a separate operand.

llvm-svn: 98683

handling constant unions.

llvm-svn: 98680

This is for the disassembly work.

There are cases where this is not possible, for example, A8.6.53 LDM Encoding T1.
In such case, we'll use an adhoc approach to deduce the Opcode programmatically.

llvm-svn: 98679

llvm-svn: 98662

llvm-svn: 98656

llvm-svn: 98648

instructions for ld/st with writeback, the flag is completely redundant.

llvm-svn: 98643

llvm-svn: 98642

U    test/CodeGen/ARM/tls2.ll
U    test/CodeGen/ARM/arm-negative-stride.ll
U    test/CodeGen/ARM/2009-10-30.ll
U    test/CodeGen/ARM/globals.ll
U    test/CodeGen/ARM/str_pre-2.ll
U    test/CodeGen/ARM/ldrd.ll
U    test/CodeGen/ARM/2009-10-27-double-align.ll
U    test/CodeGen/Thumb2/thumb2-strb.ll
U    test/CodeGen/Thumb2/ldr-str-imm12.ll
U    test/CodeGen/Thumb2/thumb2-strh.ll
U    test/CodeGen/Thumb2/thumb2-ldr.ll
U    test/CodeGen/Thumb2/thumb2-str_pre.ll
U    test/CodeGen/Thumb2/thumb2-str.ll
U    test/CodeGen/Thumb2/thumb2-ldrh.ll
U    utils/TableGen/TableGen.cpp
U    utils/TableGen/DisassemblerEmitter.cpp
D    utils/TableGen/RISCDisassemblerEmitter.h
D    utils/TableGen/RISCDisassemblerEmitter.cpp
U    Makefile.rules
U    lib/Target/ARM/ARMInstrNEON.td
U    lib/Target/ARM/Makefile
U    lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp
U    lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
U    lib/Target/ARM/AsmPrinter/ARMInstPrinter.h
D    lib/Target/ARM/Disassembler
U    lib/Target/ARM/ARMInstrFormats.td
U    lib/Target/ARM/ARMAddressingModes.h
U    lib/Target/ARM/Thumb2ITBlockPass.cpp

llvm-svn: 98640

(RISCDisassemblerEmitter) which emits the decoder functions for ARM and Thumb,
and the disassembler core which invokes the decoder function and builds up the
MCInst based on the decoded Opcode.

Added sub-formats to the NeonI/NeonXI instructions to further refine the NEONFrm
instructions to help disassembly.

We also changed the output of the addressing modes to omit the '+' from the
assembler syntax #+/-<imm> or +/-<Rm>.  See, for example, A8.6.57/58/60.

And modified test cases to not expect '+' in +reg or #+num.  For example,

; CHECK:       ldr.w	r9, [r7, #28]

llvm-svn: 98637

This does not move entirely to UAL syntax, since the default "increment after"
suffix is empty but we still use "IA" for that.

llvm-svn: 98635

llvm-svn: 98616

with the integrated assembler!

llvm-svn: 98615

llvm-svn: 98596

 - Although it would be nice to allow this decoupling, the assembler needs to be able to reason about MCSymbolRefExprs in too many places to make this viable. We can use a target specific encoding of the variant if this becomes an issue.
 - This patch also extends llvm-mc to support parsing of the modifiers, as opposed to lumping them in with the symbol.

llvm-svn: 98592

32-bit indices. Instead of shuffling each element out of the index vector,
when all indices are needed, just store the input vector to the stack and
load the elements out.

llvm-svn: 98588

Radar 7459078.

llvm-svn: 98586

MC/Mach-O/x86_64: Temporary labels in cstring sections require symbols (and external relocations, but we don't have x86_64 relocations yet).

llvm-svn: 98583

section, remove the target-specific code that performs this.

llvm-svn: 98580

llvm-svn: 98578

to is local to the translation unit, we need to place fill the value of that
symbol into the non-lazy pointer.

This should conclude all Darwin changes for placing the LSDA into the TEXT
section. There is some cleanup to do. I.e., there's no longer a special need for
target-specific code here. But that can come later.

llvm-svn: 98564

llvm-svn: 98561

where it uses types consistently.

llvm-svn: 98532

llvm-svn: 98531

llvm-svn: 98530

to re-instrument the code.  We depend on the system valgrind.h to
avoid adding a new license.

llvm-svn: 98529

doesn't have a type constraint on the scalar because we don't have
an 'sAny' type.

llvm-svn: 98527

llvm-svn: 98523

fix the rest of the buildbot failures on non-x86 hosts.

llvm-svn: 98522

(at least) on non-x86 builders.

llvm-svn: 98520

llvm-svn: 98510

the operand type.

llvm-svn: 98507

llvm-svn: 98503

llvm-svn: 98502

PR4841.  Patch by Craig Smith!

llvm-svn: 98496

llvm-svn: 98494

MachineInstr -> MCInst.  This is what the assembler backend wants,
it relaxes from smaller to larger things.  This fixes rdar://7750815

llvm-svn: 98493

to get unique assembler temporary labels.

llvm-svn: 98489