llvm-svn: 26920

- Handle FR32 to VR128:v4f32 and FR64 to VR128:v2f64 with aliases of MOVAPS
and MOVAPD. Mark them as move instructions and *hope* they will be deleted.

llvm-svn: 26919

llvm-svn: 26918

llvm-svn: 26917

text enclosed in <tt>. This ensures that (a) the text is in a fixed width
font (to indicated generated text) and (b) the text wraps without causing
the page width to be extended. The main result of this is that the report
will wrap to conform to the window size in which it is displayed instead of
having a very wide length if a warning message is long.

llvm-svn: 26916

llvm-svn: 26915

make ENABLE_OPTIMIZED=1 ENABLE_ASSERTIONS=1

llvm-svn: 26914

llvm-svn: 26913

llvm-svn: 26912

llvm-svn: 26911

llvm-svn: 26910

one, i.e. don't select it.

llvm-svn: 26909

disp field of the load/store if possible.  This compiles
CodeGen/PowerPC/load-constant-addr.ll to:

_test:
        lis r2, 2838
        lfs f1, 26848(r2)
        blr

instead of:

_test:
        lis r2, 2838
        ori r2, r2, 26848
        lfs f1, 0(r2)
        blr

llvm-svn: 26908

llvm-svn: 26907

llvm-svn: 26906

llvm-svn: 26905

figuring these out! :)

llvm-svn: 26904

llvm-svn: 26903

llvm-svn: 26902

llvm-svn: 26901

llvm-svn: 26900

llvm-svn: 26899

constant pool load.  This generates significantly nicer code for splats.

When tblgen gets bugfixed, we can remove the custom selection code.

llvm-svn: 26898

llvm-svn: 26897

llvm-svn: 26896

llvm-svn: 26895

instructions

llvm-svn: 26894

llvm-svn: 26893

The instruction patterns do not contain enough information to resolve the
exact type of the destination if it of a generic vector type.

llvm-svn: 26892

llvm-svn: 26891

llvm-svn: 26890

llvm-svn: 26889

llvm-svn: 26888

TODO: leave specific ones as VECTOR_SHUFFLE's and turn them into specialized
operations like vsplt*

llvm-svn: 26887

llvm-svn: 26886

llvm-svn: 26885

llvm-svn: 26884

llvm-svn: 26883

llvm-svn: 26882

llvm-svn: 26881