Avoid turning a floating point division with a constant power of two into a denormal multiplication.

Some platforms may treat denormals as zero, on other platforms multiplication
with a subnormal is slower than dividing by a normal.

llvm-svn: 128555

Add a test case for synthesize ivar. // rdar://9070460

llvm-svn: 128554

    
Using the new synthetic symbols generated by ObjectFileELF, have the Linux
dynamic loader plugin generate a thread plan that will take us thru a PLT entry
to the corresponding target function.

llvm-svn: 128552

for prperty reference types. // rdar://9208606.

llvm-svn: 128551

    
When populating symbol tables ObjectFileELF now generates a set of synthetic
trampoline symbols.  These new symbols correspond to entries in the program
linkage table and have a (possibly mangled) name identifying the corresponding
symbol in some DSO.  These symbols will be used by the DynamicLoader loader
plugin on Linux to provide thread plans when execution flows from one DSO to
another.

llvm-svn: 128550

Fix typo in previous check-in.

llvm-svn: 128549

llvm-svn: 128548

linux: initial support for 'real' signal handling

This patch upgrades the Linux process plugin to handle a larger range of signal
events.  For example, we can detect when the inferior has "crashed" and why,
interrupt a running process, deliver an arbitrary signal, and so on.

llvm-svn: 128547

Fixes PR9587.

llvm-svn: 128546

The idea is, that if an ieee 754 float is divided by a power of two, we can
turn the division into a cheaper multiplication. This function sees if we can
get an exact multiplicative inverse for a divisor and returns it if possible.

This is the hard part of PR9587.

I tested many inputs against llvm-gcc's frotend implementation of this
optimization and didn't find any difference. However, floating point is the
land of weird edge cases, so any review would be appreciated.

llvm-svn: 128545

    
Allow subclasses of UnixSignals to access m_signals by marking the member
protected instead of private.  This enables a subclass to provide a default
signal set as appropriate on construction.

llvm-svn: 128544

llvm-svn: 128543

llvm-svn: 128540

PHINode::Create() giving the (known or expected) number of operands.

llvm-svn: 128538

PHINode::Create() giving the (known or expected) number of operands.

llvm-svn: 128537

llvm-svn: 128535

llvm-svn: 128534

VCallAndVBaseOffsetBuilder::AddVCallOffsets() to CharUnits. No change in
functionality intended.

llvm-svn: 128531

Fill in EmulateSTRImmARM to emulate the STR (immediate,ARM) instruction.

llvm-svn: 128528

Fill in EmulateSTRBImmARM to emulate the STRB (immediate, ARM) instruction.

llvm-svn: 128527

llvm-svn: 128526

Fill in EmulateSTREX to emulate the STREX ARM instruction.

llvm-svn: 128525

When DCE clones a live range because it separates into connected components,
make sure that the clones enter the same register allocator stage as the
register they were cloned from.

For instance, clones may be split even when they where created during spilling.
Other registers created during spilling are not candidates for splitting or even
(re-)spilling.

llvm-svn: 128524

The example had gotten stale, so I made it work again, and for fun printed out the frame registers as well.

llvm-svn: 128523

functionality intended.

llvm-svn: 128522

intended.

llvm-svn: 128521

to CharUnits. No change in functionality intended.

llvm-svn: 128520

llvm-svn: 128519

to help GDB users figure out the equivalent commands in LLDB.

llvm-svn: 128518

llvm-svn: 128517

CharUnits. No change in functionality intended.

llvm-svn: 128516

llvm-svn: 128515

current time instead.

llvm-svn: 128514

Fix in r128471 is very broad. Some of the unconditional branches need line number information for better user experience. 
Restrict the fix. This fixes break.exp failures from gdb testsuite.

llvm-svn: 128513

llvm-svn: 128512

[analyzer] For -analyzer-checker-help show all the info about groups, packages, and which packages/checkers are hidden.

llvm-svn: 128511

Fill in code in EmulateSUBReg to emulate the SUB (register) ARM instruction.

llvm-svn: 128508

llvm-svn: 128507

llvm-svn: 128506

llvm-svn: 128505