the stated developer policy.

llvm-svn: 155373

test suite failures. The failures occur at each stage, and only get
worse, so I'm reverting all of them.

Please resubmit these patches, one at a time, after verifying that the
regression test suite passes. Never submit a patch without running the
regression test suite.

llvm-svn: 155372

llvm-svn: 155367

llvm-svn: 155366

llvm-svn: 155365

llvm-svn: 155364

Original commit message:

Defer some shl transforms to DAGCombine.

The shl instruction is used to represent multiplication by a constant
power of two as well as bitwise left shifts. Some InstCombine
transformations would turn an shl instruction into a bit mask operation,
making it difficult for later analysis passes to recognize the
constsnt multiplication.

Disable those shl transformations, deferring them to DAGCombine time.
An 'shl X, C' instruction is now treated mostly the same was as 'mul X, C'.

These transformations are deferred:

  (X >>? C) << C   --> X & (-1 << C)  (When X >> C has multiple uses)
  (X >>? C1) << C2 --> X << (C2-C1) & (-1 << C2)   (When C2 > C1)
  (X >>? C1) << C2 --> X >>? (C1-C2) & (-1 << C2)  (When C1 > C2)

The corresponding exact transformations are preserved, just like
div-exact + mul:

  (X >>?,exact C) << C   --> X
  (X >>?,exact C1) << C2 --> X << (C2-C1)
  (X >>?,exact C1) << C2 --> X >>?,exact (C1-C2)

The disabled transformations could also prevent the instruction selector
from recognizing rotate patterns in hash functions and cryptographic
primitives. I have a test case for that, but it is too fragile.

llvm-svn: 155362

The problem is that the struct file_status on UNIX systems has two
members called st_dev and st_ino; those are also members of the
struct stat, and they are reserved identifiers which can also be
provided as #define (and this is the case for st_dev on Hurd).
The solution (attached) is to rename them, for example adding a
"fs_" prefix (= file status) to them.

Patch by Pino Toscano

llvm-svn: 155354

Fix issue 67 by checking that the interface functions weren't redefined in the compiled source file.

llvm-svn: 155346

llvm-svn: 155341

Use MVT instead of EVT through all of LowerVECTOR_SHUFFLEtoBlend and not just the switch. Saves a little bit of binary size.

llvm-svn: 155339

Make getZeroVector and getOnesVector more alike as far as how they detect 128-bit versus 256-bit vectors. Be explicit about both sizes and use llvm_unreachable. Similar changes to getLegalSplat.

llvm-svn: 155337

llvm-svn: 155336

Tidy up spacing in LowerVECTOR_SHUFFLEtoBlend. Remove code that checks if shuffle operand has a different type than the the shuffle result since it can never happen.

llvm-svn: 155333

llvm-svn: 155332

llvm-svn: 155331

llvm-svn: 155330

fixes an assert reading "1239123123123123" when the result is already 64-bit.

llvm-svn: 155329

llvm-svn: 155328

intructions are processed. So there's no need to look at them if they're used as
operands of other instructions.

llvm-svn: 155327

Make Extract128BitVector and Insert128BitVector take an unsigned instead of an ConstantNode SDValue. getConstant was almost always called just before only to have the functions take it apart and build a new ConstantSDNode.

llvm-svn: 155325

llvm-svn: 155321

Make calls to getVectorShuffle more consistent. Use shuffle VT for calls to getUNDEF instead of requerying. Use &Mask[0] instead of Mask.data().

llvm-svn: 155320

llvm-svn: 155319

Simplify code by converting multiple places that were manually concatenating 128-bit vectors to use either CONCAT_VECTORS or a helper function. CONCAT_VECTORS will itself be lowered to the same pattern as before. The helper function is needed for concats of BUILD_VECTORs since getNode(CONCAT_VECTORS) will just return a large BUILD_VECTOR and we may be trying to lower large BUILD_VECTORS when this occurs.

llvm-svn: 155318

Found by valgrind.

llvm-svn: 155313

llvm-svn: 155309

llvm-svn: 155307

names. This saves collecting types we normally don't care about.

llvm-svn: 155300

StringRef::getAsInteger

llvm-svn: 155298

llvm-svn: 155296

llvm-svn: 155294

llvm-svn: 155291

Thanks to Andy Gibbs, to report the issue.

llvm-svn: 155287

llvm-svn: 155286

llvm-svn: 155283

llvm-svn: 155281

No functionality change.

llvm-svn: 155280

VMUL and VEXT.

llvm-svn: 155258

The X86 target is editing the selection DAG while isel is selecting
nodes following a topological ordering. When the DAG hacking triggers
CSE, nodes can be deleted and bad things happen.

llvm-svn: 155257