Remove const qualifiers from Init references, per Chris' request.

llvm-svn: 136531

llvm-svn: 136511

Make sure DagInits are unique and created only once.

llvm-svn: 136501

Make sure FieldInits are unique and created only once.

llvm-svn: 136500

Make sure VarListElementInits are unique and created only once.

llvm-svn: 136499

Make sure VarBitInits are unique and created only once.

llvm-svn: 136498

Make sure VarInits are unique and created only once.

llvm-svn: 136497

Make sure TernOpInits are unique and created only once.  This will be
important for AVX/SIMD as many operators will be used to generate
patterns and other relevant data.

llvm-svn: 136496

Make sure BinOpInits are unique and created only once.  This will be
important for AVX/SIMD as many operators will be used to generate
patterns and other relevant data.

llvm-svn: 136495

Make sure UnOpInits are unique and created only once.  This will be
important for AVX/SIMD as many operators will be used to generate
patterns and other relevant data.

llvm-svn: 136494

Ensure ListInits are unique and only created once.  This will be
important for AVX as lists will be used extensively to pass generic
patterns, prefix information and other things to lower-level
pattern-generation classes.

llvm-svn: 136493

Use a StringMap to ensure CodeInits are unique and created only
once.

llvm-svn: 136492

Use a StringMap to ensure the StringInits are unique.  This is
especially important for AVX where we will have many smallish
strings representing instruction prefixes, suffixes and the like.

llvm-svn: 136491

Use a DenseMap to make sure only one IntInit of any value exists.

llvm-svn: 136490

Make BitsInit a FoldingSetNode so we can unique it.

llvm-svn: 136489

Keep only two copies of BitInit: one for true and one for false.

llvm-svn: 136488

Keep only one UnsetInit around.

llvm-svn: 136487

Replace uses of new *Init with *Init::get.  This hides the allocation
implementation so that we can unique Inits in various ways.

llvm-svn: 136486

Make references to Inits const everywhere.  This is the final step
before making them unique.

llvm-svn: 136485

Remove all non-const iterators from Init classes.  This is another
step toward constifying Inits and ultimately turning them into
FoldingSetNodes.

llvm-svn: 136484

Get rid of all Init members that modify internal state.  This is in
preparation for making references to Inits const.

llvm-svn: 136483

Add a getValues ListInit method to return the sequence of values in
the list.

llvm-svn: 136482

Create a std::string wrapper for use as a DenseMap key.  DenseMap is
not safe in generate with strings, so this wrapper indicates that only
strings guaranteed not to have certain values should be used in the
DenseMap.

llvm-svn: 136481

llvm-svn: 136478

llvm-svn: 136467

llvm-svn: 136431

llvm-svn: 136405

llvm-svn: 136390

This can happen in cases where TableGen generated asm matcher cannot check
whether a register operand is in the right register class. e.g. mem operands.

rdar://8204588

llvm-svn: 136292

llvm-mc gives an "invalid operand" error for instructions that take an unsigned
immediate which have the high bit set such as:
    pblendw $0xc5, %xmm2, %xmm1
llvm-mc treats all x86 immediates as signed values and range checks them.
A small number of x86 instructions use the imm8 field as a set of bits.
This change only changes those instructions and where the high bit is not
ignored.  The others remain unchanged.

llvm-svn: 136287

Split am2offset into register addend and immediate addend forms, necessary for allowing the fixed-length disassembler to distinguish between SBFX and STR_PRE.

llvm-svn: 136141

llvm-svn: 136090

Rename TargetAsmParser to MCTargetAsmParser and TargetAsmLexer to MCTargetAsmLexer; rename createAsmLexer to createMCAsmLexer and createAsmParser to createMCAsmParser.

llvm-svn: 136027

llvm-svn: 136006

llvm-svn: 135841

Turn the DenseSet in MCRegisterClass into a tblgenerated bit field. This should be faster and smaller.

Goodbye static ctors and dtors!

llvm-svn: 135836

This makes TargetRegisterClass slightly slower. Next step will be making contains faster.
Eventually TargetRegisterClass will be killed entirely.

llvm-svn: 135835

The immediate is in the range 1-32, but is encoded as 0-31 in a 5-bit bitfield.
Update the representation such that we store the operand as 0-31, allowing us
to remove the encoder method and the special case handling in the disassembler.
Update the assembly parser and the instruction printer accordingly.

llvm-svn: 135823

llvm-svn: 135816

llvm-svn: 135768