llvm-svn: 80773

llvm-svn: 80186

llvm-svn: 78948

the latter is capable of representing either a primitive or an extended type.

llvm-svn: 78713

llvm-svn: 78610

MMX arguments. This fixes PR4684.

llvm-svn: 78163

metadata related, which I'm waiting on to avoid conflicting with Devang.

llvm-svn: 77721

llvm-svn: 76702

This adds location info for all llvm_unreachable calls (which is a macro now) in
!NDEBUG builds.
In NDEBUG builds location info and the message is off (it only prints
"UREACHABLE executed").

llvm-svn: 75640

Begin the painful process of tearing apart the rat'ss nest that is Constants.cpp and ConstantFold.cpp.
This involves temporarily hard wiring some parts to use the global context.  This isn't ideal, but it's
the only way I could figure out to make this process vaguely incremental.

llvm-svn: 75445

Make llvm_unreachable take an optional string, thus moving the cerr<< out of
line.
LLVM_UNREACHABLE is now a simple wrapper that makes the message go away for
NDEBUG builds.

llvm-svn: 75379

llvm-svn: 75278

llvm-svn: 75276

add a couple of predicates to test for "stub style pic in PIC mode" and "stub style pic in dynamic-no-pic" mode.

llvm-svn: 75273

elimiantes the last use of GVRequiresExtraLoad, so delete it.

llvm-svn: 75244

llvm-svn: 75232

more complex and slow than just directly testing what we care about.

llvm-svn: 75231

split its handling out to PCRelGVRequiresExtraLoad, and simplify code
based on this.

llvm-svn: 75230

llvm-svn: 75228

llvm-svn: 75153

isel.

llvm-svn: 75117

llvm-svn: 75113

llvm-svn: 75112

in pic or dynamic-no-pic mode. Also, x86-64 never used picstylegot.

llvm-svn: 75101

This fixes an llvm-gcc bootstrap problem I introduced.

llvm-svn: 74691

constant pool references that weren't getting properly rip-relative.

llvm-svn: 74689

a key is present in a std::map or DenseMap to use find instead.

llvm-svn: 74676

pic mode.

llvm-svn: 74582

llvm-svn: 74377

llvm-svn: 74375

implementation primarily differs from the former in that the asmprinter
doesn't make a zillion decisions about whether or not something will be
RIP relative or not.  Instead, those decisions are made by isel lowering
and propagated through to the asm printer.  To achieve this, we:

1. Represent RIP relative addresses by setting the base of the X86 addr
   mode to X86::RIP.
2. When ISel Lowering decides that it is safe to use RIP, it lowers to
   X86ISD::WrapperRIP.  When it is unsafe to use RIP, it lowers to
   X86ISD::Wrapper as before.
3. This removes isRIPRel from X86ISelAddressMode, representing it with
   a basereg of RIP instead.
4. The addressing mode matching logic in isel is greatly simplified.
5. The asmprinter is greatly simplified, notably the "NotRIPRel" predicate
   passed through various printoperand routines is gone now.
6. The various symbol printing routines in asmprinter now no longer infer
   when to emit (%rip), they just print the symbol.

I think this is a big improvement over the previous situation.  It does have
two small caveats though: 1. I implemented a horrible "no-rip" modifier for
the inline asm "P" constraint modifier.  This is a short term hack, there is
a much better, but more involved, solution.  2. I had to xfail an 
-aggressive-remat testcase because it isn't handling the use of RIP in the
constant-pool reading instruction.  This specific test is easy to fix without
-aggressive-remat, which I intend to do next.

llvm-svn: 74372

llvm-svn: 74366

out of sync with regular cc.

The only difference between the tail call cc and the normal
cc was that one parameter register - R9 - was reserved for
calling functions through a function pointer. After time the
tail call cc has gotten out of sync with the regular cc. 

We can use R11 which is also caller saved but not used as
parameter register for potential function pointers and
remove the special tail call cc on x86-64.

llvm-svn: 73233

this function" when using a not-too-smart compiler.

llvm-svn: 72768

will make it more obvious what it represents, and stop
it being confused with the StoreSize.

llvm-svn: 71349

llvm-svn: 70902

GR32_ABCD, and GR64_ABCD, respectively, to help describe them.

llvm-svn: 70210

 - Add patterns for h-register extract, which avoids a shift and mask,
   and in some cases a temporary register.
 - Add address-mode matching for turning (X>>(8-n))&(255<<n), where
   n is a valid address-mode scale value, into an h-register extract
   and a scaled-offset address.
 - Replace X86's MOV32to32_ and related instructions with the new
   target-independent COPY_TO_SUBREG instruction.

On x86-64 there are complicated constraints on h registers, and
CodeGen doesn't currently provide a high-level way to express all of them,
so they are handled with a bunch of special code. This code currently only
supports extracts where the result is used by a zero-extend or a store,
though these are fairly common.

These transformations are not always beneficial; since there are only
4 h registers, they sometimes require extra move instructions, and
this sometimes increases register pressure because it can force out
values that would otherwise be in one of those registers. However,
this appears to be relatively uncommon.

llvm-svn: 68962

See comment for details.  This fixes rdar://6772169

llvm-svn: 68890

llvm-svn: 68887