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  1. Aug 27, 2009
    • Daniel Dunbar's avatar
      llvm-mc/X86: Implement single instruction encoding interface for MC. · 981a71c3
      Daniel Dunbar authored
       - Note, this is a gigantic hack, with the sole purpose of unblocking further
         work on the assembler (its also possible to test the mathcer more completely
         now).
      
       - Despite being a hack, its actually good enough to work over all of 403.gcc
         (although some encodings are probably incorrect). This is a testament to the 
         beauty of X86's MachineInstr, no doubt! ;)
      
      llvm-svn: 80234
      981a71c3
  2. Aug 22, 2009
  3. Aug 12, 2009
  4. Aug 11, 2009
  5. Aug 04, 2009
  6. Aug 03, 2009
  7. Jul 28, 2009
    • Chris Lattner's avatar
      Rip all of the global variable lowering logic out of TargetAsmInfo. Since · 5e693ed0
      Chris Lattner authored
      it is highly specific to the object file that will be generated in the end,
      this introduces a new TargetLoweringObjectFile interface that is implemented
      for each of ELF/MachO/COFF/Alpha/PIC16 and XCore.
      
      Though still is still a brutal and ugly refactoring, this is a major step
      towards goodness.
      
      This patch also:
      1. fixes a bunch of dangling pointer problems in the PIC16 backend.
      2. disables the TargetLowering copy ctor which PIC16 was accidentally using.
      3. gets us closer to xcore having its own crazy target section flags and
         pic16 not having to shadow sections with its own objects.
      4. fixes wierdness where ELF targets would set CStringSection but not
         CStringSection_.  Factor the code better.
      5. fixes some bugs in string lowering on ELF targets.
      
      llvm-svn: 77294
      5e693ed0
  8. Jul 25, 2009
  9. Jul 19, 2009
  10. Jul 16, 2009
  11. Jul 15, 2009
    • Daniel Dunbar's avatar
      Reapply TargetRegistry refactoring commits. · e833810a
      Daniel Dunbar authored
      --- Reverse-merging r75799 into '.':
       U   test/Analysis/PointerTracking
      U    include/llvm/Target/TargetMachineRegistry.h
      U    include/llvm/Target/TargetMachine.h
      U    include/llvm/Target/TargetRegistry.h
      U    include/llvm/Target/TargetSelect.h
      U    tools/lto/LTOCodeGenerator.cpp
      U    tools/lto/LTOModule.cpp
      U    tools/llc/llc.cpp
      U    lib/Target/PowerPC/PPCTargetMachine.h
      U    lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp
      U    lib/Target/PowerPC/PPCTargetMachine.cpp
      U    lib/Target/PowerPC/PPC.h
      U    lib/Target/ARM/ARMTargetMachine.cpp
      U    lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
      U    lib/Target/ARM/ARMTargetMachine.h
      U    lib/Target/ARM/ARM.h
      U    lib/Target/XCore/XCoreTargetMachine.cpp
      U    lib/Target/XCore/XCoreTargetMachine.h
      U    lib/Target/PIC16/PIC16TargetMachine.cpp
      U    lib/Target/PIC16/PIC16TargetMachine.h
      U    lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp
      U    lib/Target/Alpha/AlphaTargetMachine.cpp
      U    lib/Target/Alpha/AlphaTargetMachine.h
      U    lib/Target/X86/X86TargetMachine.h
      U    lib/Target/X86/X86.h
      U    lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h
      U    lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp
      U    lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h
      U    lib/Target/X86/X86TargetMachine.cpp
      U    lib/Target/MSP430/MSP430TargetMachine.cpp
      U    lib/Target/MSP430/MSP430TargetMachine.h
      U    lib/Target/CppBackend/CPPTargetMachine.h
      U    lib/Target/CppBackend/CPPBackend.cpp
      U    lib/Target/CBackend/CTargetMachine.h
      U    lib/Target/CBackend/CBackend.cpp
      U    lib/Target/TargetMachine.cpp
      U    lib/Target/IA64/IA64TargetMachine.cpp
      U    lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp
      U    lib/Target/IA64/IA64TargetMachine.h
      U    lib/Target/IA64/IA64.h
      U    lib/Target/MSIL/MSILWriter.cpp
      U    lib/Target/CellSPU/SPUTargetMachine.h
      U    lib/Target/CellSPU/SPU.h
      U    lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp
      U    lib/Target/CellSPU/SPUTargetMachine.cpp
      U    lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp
      U    lib/Target/Mips/MipsTargetMachine.cpp
      U    lib/Target/Mips/MipsTargetMachine.h
      U    lib/Target/Mips/Mips.h
      U    lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp
      U    lib/Target/Sparc/SparcTargetMachine.cpp
      U    lib/Target/Sparc/SparcTargetMachine.h
      U    lib/ExecutionEngine/JIT/TargetSelect.cpp
      U    lib/Support/TargetRegistry.cpp
      
      llvm-svn: 75820
      e833810a
    • Stuart Hastings's avatar
      Revert 75762, 75763, 75766..75769, 75772..75775, 75778, 75780, 75782 to repair... · 338191cd
      Stuart Hastings authored
      Revert 75762, 75763, 75766..75769, 75772..75775, 75778, 75780, 75782 to repair broken LLVM-GCC build.
      Will revert 75770 in the llvm-gcc trunk.
      
      llvm-svn: 75799
      338191cd
    • Daniel Dunbar's avatar
      Replace large swaths of copy-n-paste code with obvious helper function... · eb8c83b4
      Daniel Dunbar authored
       - Which was already present in the module!
      
       - I skipped this xform for Alpha, since it runs an extra pass during assembly
         emission, but not when emitting assembly via the DumpAsm flag.
      
       - No functionality change.
      
      --
      ddunbar@giles:llvm$ svn diff | grep '^- ' | sort | uniq -c
        18 -      PM.add(AsmPrinterCtor(ferrs(), *this, true));
        18 -    assert(AsmPrinterCtor && "AsmPrinter was not linked in");
        18 -    if (AsmPrinterCtor)
        18 -  if (DumpAsm) {
        18 -  }
      ddunbar@giles:llvm$ svn diff | grep '^+ ' | sort | uniq -c
        18 +    addAssemblyEmitter(PM, OptLevel, true, ferrs());
        18 +  if (DumpAsm)
      --
      
      llvm-svn: 75782
      eb8c83b4
    • Daniel Dunbar's avatar
      863e587d
    • Daniel Dunbar's avatar
      Provide TargetMachine implementations with reference to Target they were created · 6db8134e
      Daniel Dunbar authored
      from.
       - This commit is almost entirely propogating the reference through the
         TargetMachine subclasses' constructor calls.
      
      llvm-svn: 75778
      6db8134e
    • Daniel Dunbar's avatar
      Register Target's TargetMachine and AsmPrinter in the new registry. · b22f50e4
      Daniel Dunbar authored
       - This abuses TargetMachineRegistry's constructor for now, this will get
         cleaned up in time.
      
      llvm-svn: 75762
      b22f50e4
  12. Jul 14, 2009
    • David Greene's avatar
      · a31f96cf
      David Greene authored
      Have asm printers use formatted_raw_ostream directly to avoid a
      dynamic_cast<>.
      
      llvm-svn: 75670
      a31f96cf
  13. Jul 10, 2009
  14. Jul 09, 2009
  15. Jul 06, 2009
  16. Jul 01, 2009
  17. Jun 27, 2009
    • Chris Lattner's avatar
      cce1589e
    • Chris Lattner's avatar
      Reimplement rip-relative addressing in the X86-64 backend. The new · fea81da4
      Chris Lattner authored
      implementation primarily differs from the former in that the asmprinter
      doesn't make a zillion decisions about whether or not something will be
      RIP relative or not.  Instead, those decisions are made by isel lowering
      and propagated through to the asm printer.  To achieve this, we:
      
      1. Represent RIP relative addresses by setting the base of the X86 addr
         mode to X86::RIP.
      2. When ISel Lowering decides that it is safe to use RIP, it lowers to
         X86ISD::WrapperRIP.  When it is unsafe to use RIP, it lowers to
         X86ISD::Wrapper as before.
      3. This removes isRIPRel from X86ISelAddressMode, representing it with
         a basereg of RIP instead.
      4. The addressing mode matching logic in isel is greatly simplified.
      5. The asmprinter is greatly simplified, notably the "NotRIPRel" predicate
         passed through various printoperand routines is gone now.
      6. The various symbol printing routines in asmprinter now no longer infer
         when to emit (%rip), they just print the symbol.
      
      I think this is a big improvement over the previous situation.  It does have
      two small caveats though: 1. I implemented a horrible "no-rip" modifier for
      the inline asm "P" constraint modifier.  This is a short term hack, there is
      a much better, but more involved, solution.  2. I had to xfail an 
      -aggressive-remat testcase because it isn't handling the use of RIP in the
      constant-pool reading instruction.  This specific test is easy to fix without
      -aggressive-remat, which I intend to do next.
      
      llvm-svn: 74372
      fea81da4
  18. Jun 24, 2009
  19. Jun 16, 2009
  20. Jun 11, 2009
    • Bruno Cardoso Lopes's avatar
      Support for ELF Visibility · 1656366e
      Bruno Cardoso Lopes authored
      Emission for globals, using the correct data sections
      Function alignment can be computed for each target using TargetELFWriterInfo
      Some small fixes
      
      llvm-svn: 73201
      1656366e
  21. Jun 06, 2009
  22. Jun 03, 2009
  23. Jun 01, 2009
  24. May 30, 2009
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