Make isSafeToSpeculativelyExecute() return the right answer for some new instructions.  Found by inspection; not sure what practical impact, if any, this has.

llvm-svn: 138962

llvm-svn: 138955

llvm-svn: 138954

An instruction may define part of a register where the other bits are
undefined. In that case, it is safe to rematerialize the instruction.
For example:

  %vreg2:ssub_0<def> = VLDRS <cp#0>, 0, pred:14, pred:%noreg, %vreg2<imp-def>

The extra <imp-def> operand indicates that the instruction does not read
the other parts of the virtual register, so a remat is safe.

This patch simply allows multiple def operands for the virtual register.
It is MI->readsVirtualRegister() that determines if we depend on a
previous value so remat is impossible.

llvm-svn: 138953

llvm-svn: 138952

only one use. Fix PR10825.

llvm-svn: 138951

llvm-svn: 138948

llvm-svn: 138946

The problem is fixed for all register allocators by r138944, so this
patch is no longer necessary.

<rdar://problem/10032939>

llvm-svn: 138945

An instruction that redefines only part of a larger register can never
be rematerialized since the virtual register value depends on the old
value in other parts of the register.

This was fixed for the inline spiller in r138794.  This patch fixes the
problem for all register allocators, and includes a small test case.

<rdar://problem/10032939>

llvm-svn: 138944

Teach MachineLICM reg pressure tracking code to deal with MVT::untyped. Sorry, I can't come up with a small test case. rdar://10043690

llvm-svn: 138934

llvm-svn: 138933

Resubmit with fix. Properly remove the instructions except for landingpad, which should be removed only when its invokes are.

llvm-svn: 138932

llvm-svn: 138931

The landingpad instruction can be removed only when its invokes are removed.

llvm-svn: 138930

llvm-svn: 138928

llvm-svn: 138927

llvm-svn: 138925

Added canClobberReachingPhysRegUse() to handle a particular pattern in
which a two-address instruction could be forced to interfere with
EFLAGS, causing a compare to be unnecessarilly cloned.
Fixes rdar://problem/5875261

llvm-svn: 138924

This was found via a nightly build of 483.xalancbmk.

llvm-svn: 138923

llvm-svn: 138922

llvm-svn: 138918

llvm-svn: 138916

llvm-svn: 138915

llvm-svn: 138914

Make sure the low bit of the PC is set when loading an address directly
for jump tables in static relocation model.

llvm-svn: 138912

The asm parser currently selects the wrong encoding for non-conditional Thumb2 branches.  However, this exposed a number of situations where the decoder was too permissive in allowing invalid instructions to decode successful.  Specify additional fixed bits to close those gaps.

llvm-svn: 138910

llvm-svn: 138908

llvm-svn: 138906

llvm-svn: 138905

llvm-svn: 138904

llvm-svn: 138903

Add tests for the transformations SCCP can do on atomic loads and stores (which are safe without any modifications).

llvm-svn: 138902

Stores sizes as uint64_t to avoid possible truncation.

llvm-svn: 138901

llvm-svn: 138900

llvm-svn: 138898

llvm-svn: 138897

llvm-svn: 138896

llvm-svn: 138895

llvm-svn: 138894