- Oct 10, 2011
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Jakob Stoklund Olesen authored
The table is indexed by opcode, so simply removing pseudo-instructions creates a wrong mapping from opcode to table entry. Add a test case for xorps which has a very high opcode that exposes this problem. llvm-svn: 141562
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Bill Wendling authored
hang, and possibly SPEC/CINT2006/464_h264ref. llvm-svn: 141560
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Owen Anderson authored
llvm-svn: 141557
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Bill Wendling authored
isel doesn't ignore it. llvm-svn: 141548
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Benjamin Kramer authored
llvm-svn: 141535
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Benjamin Kramer authored
llvm-svn: 141534
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Benjamin Kramer authored
llvm-svn: 141533
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Bill Wendling authored
ARMII::AddrModeT1_s, we need to take into account that if the frame register is ARM::SP, then the number of bits is 8. If it's not ARM::SP, then the number of bits is 5. llvm-svn: 141529
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Craig Topper authored
llvm-svn: 141527
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Chad Rosier authored
the tADDrSPi instruction can't be used. Make sure we're updating the opcode to tADDi3 in all cases. rdar://10254707 llvm-svn: 141523
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- Oct 09, 2011
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Justin Holewinski authored
llvm-svn: 141508
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Craig Topper authored
llvm-svn: 141505
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- Oct 08, 2011
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Jakob Stoklund Olesen authored
A GR8_NOREX virtual register is created when extrating a sub_8bit_hi sub-register: %vreg2<def> = COPY %vreg1:sub_8bit_hi; GR8_NOREX:%vreg2 %GR64_ABCD:%vreg1 TEST8ri_NOREX %vreg2, 1, %EFLAGS<imp-def>; GR8_NOREX:%vreg2 If such a live range is ever split, its register class must not be inflated to GR8. The sub-register copy can only target GR8_NOREX. I dont have a test case for this theoretical bug. llvm-svn: 141500
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Jakob Stoklund Olesen authored
In 64-bit mode, sub_8bit_hi sub-registers can only be used by NOREX instructions. The COPY created from the EXTRACT_SUBREG DAG node cannot target all GR8 registers, only those in GR8_NOREX. TO enforce this, we ensure that all instructions using the EXTRACT_SUBREG are GR8_NOREX constrained. This fixes PR11088. llvm-svn: 141499
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Jakob Stoklund Olesen authored
llvm-svn: 141498
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Benjamin Kramer authored
llvm-svn: 141495
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Che-Liang Chiou authored
llvm-svn: 141492
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Nicolas Geoffray authored
llvm-svn: 141490
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NAKAMURA Takumi authored
llvm-svn: 141485
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NAKAMURA Takumi authored
llvm-svn: 141484
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NAKAMURA Takumi authored
llvm-svn: 141483
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Anton Korobeynikov authored
llvm-svn: 141481
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Akira Hatanaka authored
llvm-svn: 141476
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Akira Hatanaka authored
llvm-svn: 141475
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Akira Hatanaka authored
llvm-svn: 141474
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Akira Hatanaka authored
conversion instructions. llvm-svn: 141473
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Andrew Trick authored
llvm-svn: 141472
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Akira Hatanaka authored
instruction selector to generate them. llvm-svn: 141471
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Andrew Trick authored
llvm-svn: 141470
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Bill Wendling authored
across unwind edges. This is for the back-end which expects such things. The code is from the original SjLj EH pass. llvm-svn: 141463
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Peter Collingbourne authored
cross build, so that a native version of clang-tblgen is available. Should unbreak Clang cross build. Also disable Polly for the native tool build, since it depends on external libraries which may not be available, and it isn't required anyway. llvm-svn: 141454
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Michael J. Spencer authored
llvm-svn: 141451
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Michael J. Spencer authored
llvm-svn: 141450
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Michael J. Spencer authored
llvm-svn: 141449
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Michael J. Spencer authored
llvm-svn: 141448
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Jim Grosbach authored
llvm-svn: 141447
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Jim Grosbach authored
llvm-svn: 141446
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Andrew Trick authored
Fixes rdar://problem/5064068 llvm-svn: 141442
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Eli Friedman authored
Fix APInt::operator*= so that it computes the correct result for large integers where there is unsigned overflow. Fix APFloat::toString so that it doesn't depend on the incorrect behavior in common cases (and computes the correct result in some rare cases). Fixes PR11086. llvm-svn: 141441
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Nick Lewycky authored
llvm-svn: 141440
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