Add a new option to indicate we want the code generator to emit code quickly,not spending tons of time microoptimizing it.  This is useful for an -O0style of build.

llvm-svn: 24233

llvm-svn: 24228

love (especially with -sched=simple)

llvm-svn: 24225

alignment information appropriately.  Includes code for PowerPC to support
fixed-size allocas with alignment larger than the stack.  Support for
arbitrarily aligned dynamic allocas coming soon.

llvm-svn: 24224

a bunch of other things) but is currently ignored by the code
generator.

llvm-svn: 24206

llvm-svn: 24195

out failed (e.g. methcall) - now the code compiles, though it's not quite
right just yet (tm) ;)

would fix this but it's 3am! :O

llvm-svn: 24186

llvm-svn: 24183

llvm-svn: 24182

llvm-svn: 24175

llvm-svn: 24164

llvm-svn: 24161

This fixes PR641

llvm-svn: 24154

though)

llvm-svn: 24152

llvm-svn: 24151

llvm-svn: 24150

selecting ints to IA64, and a few other ia64 bits and pieces

llvm-svn: 24147

stop pretending -0.0 and -1.0 are machine constants

llvm-svn: 24146

llvm-svn: 24139

need to send chris, jim and sampo a box of fish each

llvm-svn: 24135

one sometimes needs to pass FP args in both FP *and* integer registers.

llvm-svn: 24134

clever little tablegen!

llvm-svn: 24133

llvm-svn: 24132

llvm-svn: 24131

llvm-svn: 24130

not compiling a whole program at a time :)

llvm-svn: 24129

llvm-svn: 24118

llvm-svn: 24110

llvm-svn: 24109

llvm-svn: 24107

llvm-svn: 24096

DAG instruction selector, which should be destroyed one day (in the pattern
isel also) since ia64 can pack any constant in the instruction stream

llvm-svn: 24094

llvm-svn: 24088

llvm-svn: 24080

llvm-svn: 24075

llvm-svn: 24073

tracked as PR642

llvm-svn: 24068

llvm-svn: 24067

llvm-svn: 24064

llvm-svn: 24063