by PR9088 fixes things.

llvm-svn: 124561

to do this and more, but would only do it if X/Y had only one use.  Spotted as the
most common missed simplification in SPEC by my auto-simplifier, now that it knows
about nuw/nsw/exact flags.  This removes a bunch of multiplications from 447.dealII
and 483.xalancbmk.  It also removes a lot from tramp3d-v4, which results in much
more inlining.

llvm-svn: 124560

Teach DAGCombine to fold fold (sra (trunc (sr x, c1)), c2) -> (trunc (sra x, c1+c2) when c1 equals the amount of bits that are truncated off.

This happens all the time when a smul is promoted to a larger type.

On x86-64 we now compile "int test(int x) { return x/10; }" into
  movslq  %edi, %rax
  imulq $1717986919, %rax, %rax
  movq  %rax, %rcx
  shrq  $63, %rcx
  sarq  $34, %rax <- used to be "shrq $32, %rax; sarl $2, %eax"
  addl  %ecx, %eax

This fires 96 times in gcc.c on x86-64.

llvm-svn: 124559

llvm-svn: 124557

llvm-svn: 124556

This is the one where one of the branches of the select is another select on
the same condition.

llvm-svn: 124547

The DEBUG() call at line 606 demands to see raw_ostream's definition. I have no idea why this seems to only break MSVC.

llvm-svn: 124545

llvm-svn: 124544

llvm-svn: 124535

llvm-svn: 124534

llvm-svn: 124533

This happens e.g. for code like "X - X%10" where we lower the modulo operation
to a series of multiplies and shifts that are then subtracted from X, leading to
this missed optimization.

llvm-svn: 124532

llvm-svn: 124527

llvm-svn: 124526

llvm-svn: 124522

Re-commit r124462 with fixes. Tail recursion elim will now dup ret into unconditional predecessor to enable TCE on demand.

llvm-svn: 124518

Modified patch by Adam Preuss.

This builds on the existing framework for block tracing, edge profiling and optimal edge profiling.
See -help-hidden for new flags.
For documentation, see the technical report "Implementation of Path Profiling..." in llvm.org/pubs.

llvm-svn: 124515

llvm-svn: 124498

llvm-svn: 124497

zero effect on the testsuite (it improves two Ada testcases).

llvm-svn: 124496

Patch by Jyun-Yan You.

llvm-svn: 124492

benchmarks, and that it can be simplified to X/Y.  (In general you can only
simplify (Z*Y)/Y to Z if the multiplication did not overflow; if Z has the
form "X/Y" then this is the case).  This patch implements that transform and
moves some Div logic out of instcombine and into InstructionSimplify.
Unfortunately instcombine gets in the way somewhat, since it likes to change
(X/Y)*Y into X-(X rem Y), so I had to teach instcombine about this too.
Finally, thanks to the NSW/NUW flags, sometimes we know directly that "Z*Y"
does not overflow, because the flag says so, so I added that logic too.  This
eliminates a bunch of divisions and subtractions in 447.dealII, and has good
effects on some other benchmarks too.  It seems to have quite an effect on
tramp3d-v4 but it's hard to say if it's good or bad because inlining decisions
changed, resulting in massive changes all over.

llvm-svn: 124487

llvm-svn: 124486

llvm-svn: 124485

functionality change.

llvm-svn: 124482

llvm-svn: 124480

llvm-svn: 124479

llvm-svn: 124478

the function equality set.

llvm-svn: 124475

llvm-svn: 124472

llvm-svn: 124469

llvm-svn: 124468

llvm-svn: 124467

  branches. PR8575, rdar://5134905, rdar://8911460.
- Allow codegen tail duplication to dup small return blocks after register
  allocation is done.

llvm-svn: 124462

llvm-svn: 124458

only .syntax unified is supported.

llvm-svn: 124454

location was stated with FFI_INCLUDE_DIR/FFI_LIBRARY_DIR.

llvm-svn: 124449

[AVX] Clean up the code to configure target lowering for AVX.  Specify
how to lower more/new operations.  This is a prerequisite for adding
additional AVX lowering.

llvm-svn: 124447

llvm-svn: 124443

rdar://problem/8893967: JM/lencod miscompile at -arch armv7 -mthumb -O3

Added ResurrectKill to remove kill flags after we decide to reused a
physical register. And (hopefully) ensure that we call it in all the
right places.

Sorry, I'm not checking in a unit test given that it's a miscompile I
can't reproduce easily with a toy example. Failures in the rewriter
depend on a series of heuristic decisions maked during one of the many
upstream phases in codegen. This case would require coercing regalloc
to generate a couple of rematerialzations in a way that causes the
scavenger to reuse the same register at just the wrong point.

The general way to test this is to implement kill flags
verification. Then we could have a simple, robust compile-only unit
test. That would be worth doing if the whole pass was not about to
disappear. At this point we focus verification work on the next
generation of regalloc.

llvm-svn: 124442