llvm-svn: 44010

to be a pass of its own.  Instead, move it out into a helper method.

llvm-svn: 44002

llvm-svn: 43960

llvm-svn: 43944

apints on big-endian machines if the bitwidth is
not a multiple of 8.  Introduce a new helper,
MVT::getStoreSizeInBits, and use it.

llvm-svn: 43934

llvm-svn: 43933

Then:
        call    "L1$pb"
"L1$pb":
        popl    %eax
		...
LBB1_1: # entry
        imull   $4, %ecx, %ecx
        leal    LJTI1_0-"L1$pb"(%eax), %edx
        addl    LJTI1_0-"L1$pb"(%ecx,%eax), %edx
        jmpl    *%edx

        .align  2
        .set L1_0_set_3,LBB1_3-LJTI1_0
        .set L1_0_set_2,LBB1_2-LJTI1_0
        .set L1_0_set_5,LBB1_5-LJTI1_0
        .set L1_0_set_4,LBB1_4-LJTI1_0
LJTI1_0:
        .long    L1_0_set_3
        .long    L1_0_set_2

Now:
        call    "L1$pb"
"L1$pb":
        popl    %eax
		...
LBB1_1: # entry
        addl    LJTI1_0-"L1$pb"(%eax,%ecx,4), %eax
        jmpl    *%eax

		.align  2
		.set L1_0_set_3,LBB1_3-"L1$pb"
		.set L1_0_set_2,LBB1_2-"L1$pb"
		.set L1_0_set_5,LBB1_5-"L1$pb"
		.set L1_0_set_4,LBB1_4-"L1$pb"
LJTI1_0:
        .long    L1_0_set_3
        .long    L1_0_set_2

llvm-svn: 43924

llvm-svn: 43923

llvm-svn: 43922

llvm-svn: 43911

llvm-svn: 43910

If both parts of smul_lohi, etc. are used, don't simplify. If only one part is used, try simplify it.

llvm-svn: 43888

Add the majority of machine-level critical edge breaking pass.  Most of this was written by Fernando, cleanup and updating to TOT by me.

This still needs a bit of work, particularly to handle jump tables properly.

llvm-svn: 43885

llvm-svn: 43869

llvm-svn: 43866

llvm-svn: 43819

llvm-svn: 43805

llvm-svn: 43781

When the allocator rewrite a spill register with new virtual register, it replaces other operands of the same register. Watch out for situations where
only some of the operands are sub-register uses.

llvm-svn: 43776

llvm-svn: 43764

llvm-svn: 43763

other uses. There was a overly restricted check that prevented some obvious
cases.

llvm-svn: 43762

llvm-svn: 43755

llvm-svn: 43754

llvm-svn: 43751

llvm-svn: 43744

Thanks for the suggestions Bill :-)

llvm-svn: 43742

parameters.  Rename ValueRefList to ParamList
in AsmParser, since its only use is for parameters.

llvm-svn: 43734

size for the field we get ABI padding automatically, so
no need to put it in again when we emit the field.

llvm-svn: 43720

register coalescer interface: RegisterCoalescing.

llvm-svn: 43714

llvm-svn: 43700

defined on the same instruction. This fixes PR1767.

llvm-svn: 43699

llvm-svn: 43692

should only effect x86 when using long double.  Now
12/16 bytes are output for long double globals (the
exact amount depends on the alignment).  This brings
globals in line with the rest of LLVM: the space
reserved for an object is now always the ABI size.
One tricky point is that only 10 bytes should be
output for long double if it is a field in a packed
struct, which is the reason for the additional
argument to EmitGlobalConstant.

llvm-svn: 43688

llvm-svn: 43684

If an interval is being undone clear its preference as well since the source interval may have been undone as well.

llvm-svn: 43670

can be eliminated by the allocator is the destination and source targets the
same register. The most common case is when the source and destination registers
are in different class. For example, on x86 mov32to32_ targets GR32_ which
contains a subset of the registers in GR32.

The allocator can do 2 things:
1. Set the preferred allocation for the destination of a copy to that of its source.
2. After allocation is done, change the allocation of a copy destination (if
   legal) so the copy can be eliminated.

This eliminates 443 extra moves from 403.gcc.

llvm-svn: 43662

llvm-svn: 43652

llvm-svn: 43651

llvm-svn: 43644