fully specified at this level.  Subclasses of NLdStLN can specify selective
bit(s) for Inst{7-4}, as is done for VLD[234]LN* and VST[234]LN* inside
ARMInstrNEON.td.

llvm-svn: 89377

Fix a small bug.

Fix one case we missed to make sure we reserve registers from
allocation.

llvm-svn: 89376

they are lowered to instruction sequences more complex than a simple
load, such that CodeGen cannot rematerialize them, a reload from a
spill slot is likely to be cheaper than the complex sequence.

llvm-svn: 89374

llvm-svn: 89372

llvm-svn: 89369

llvm-svn: 89364

llvm-svn: 89360

Add support for spreading register allocation.

Add a -linearscan-skip-count argument (default to 0) that tells the
allocator to remember the last N registers it allocated and skip them
when looking for a register candidate.  This tends to spread out
register usage and free up post-allocation scheduling at the cost of
slightly more register pressure.  The primary benefit is the ability
to backschedule reloads.

This is turned off by default.

llvm-svn: 89356

llvm-svn: 89341

llvm-svn: 89339

llvm-svn: 89337

llvm-svn: 89328

llvm-svn: 89326

llvm-svn: 89325

- Support mips1 like load/store of doubles:

Instead of:
  sdc $f0, X($3)
Generate:
  swc $f0, X($3)
  swc $f1, X+4($3)

llvm-svn: 89322

llvm-svn: 89316

All spiller calls in RegAllocLinearScan now go through the new Spiller interface.
The "-new-spill-framework" command line option has been removed. To use the trivial in-place spiller you should now pass "-spiller=trivial -rewriter=trivial".
(Note the trivial spiller/rewriter are only meant to serve as examples of the new in-place modification work. Enabling them will yield terrible, though hopefully functional, code).

llvm-svn: 89311

for uses inside the loop. This works better with LSR. Disabled behind
-simplify-iv-users while benchmarking.

llvm-svn: 89299

Eliminate duplicate phi nodes in loops. Loop rotation, for example, can introduce these, and it's beneficial to later passes to clean them up.

llvm-svn: 89298

llvm-svn: 89297

exception table than DataRel.

llvm-svn: 89279

llvm-svn: 89275

llvm-svn: 89273

Place the EH table in the __TEXT section on MachO. It saves space.

llvm-svn: 89270

the tail of a block may make that block a new candidate for duplication.

llvm-svn: 89264

llvm-svn: 89254

When TwoAddressInstructionPass deletes a dead instruction, make sure that all
register kills are accounted for. The 2-addr register does not get special
treatment.

llvm-svn: 89246

Verify LiveVariables information when present.

llvm-svn: 89241

llvm-svn: 89240

Fixed the in-place spiller and trivial rewriter, which had been broken by the recent SlotIndexes work.

llvm-svn: 89238

Added getDefaultSubtargetFeatures method to SubtargetFeatures class which returns a correct feature string for given triple.

llvm-svn: 89236

llvm-svn: 89225

llvm-svn: 89218

llvm-svn: 89214

when LiveVariables is available.

The -split-phi-edges is now gone, and so is the hack to disable it when using
the local register allocator. The PHIElimination pass no longer has
LiveVariables as a prerequisite - that is what broke the local allocator.
Instead we do critical edge splitting when possible - that is when
LiveVariables is available.

llvm-svn: 89213

llvm-svn: 89198

contents of the block to be duplicated.  Use this for ARM Cortex A8/9 to
be more aggressive tail duplicating indirect branches, since it makes it
much more likely that they will be predicted in the branch target buffer.
Testcase coming soon.

llvm-svn: 89187

This is probably not confined to *just* these two things.

Anyway, the llvm-gcc front-end may look up the structure layout information for
an abstract type. That information will be stored into a table with the FE's
TD. Instruction combine can come along and also ask for information on that
abstract type, but for a separate TD (the one associated with the pass manager).

After the type is refined, the old structure layout information in the pass
manager's TD file is out of date. If a new type is allocated in the same space
as the old-unrefined type, then the structure type information in the pass
manager's TD file will be wrong, but won't know it.

Fix this by making the TD's structure type information an abstract type user.

llvm-svn: 89176

llvm-svn: 89175

llvm-svn: 89167