Commits · b406843fe5daa38d36c2f2fc6c41078334e63107 · Roger Ferrer / llvm-epi-0.8

May 28, 2011
- Define a wrapper node for target constant nodes (tglobaladdr, etc.). · b406843f
  Akira Hatanaka authored May 28, 2011
```
Need this to prevent emitting illegal conditional move instructions. 

llvm-svn: 132240
```
  b406843f
- Add 132187 back now that the real problem is fixed. · 19fea7a8
  Rafael Espindola authored May 28, 2011
```
llvm-svn: 132238
```
  19fea7a8
- Fix the remaining atomic intrinsics to use the right register classes on Thumb2, · 1d553a2c
  Cameron Zwarich authored May 27, 2011
```
and add some basic tests for them.

llvm-svn: 132235
```
  1d553a2c
- ARM asm parser wasn't able to parse a "mov" instruction while in Thumb · 787dfadc
  Bruno Cardoso Lopes authored May 27, 2011
```
mode (only the "mov.w" variant). Now, when parsing "mov" in thumb mode,
default to the Thumb 1 versions/encodings.

llvm-svn: 132233
```
  787dfadc
- It looks like 132187 might have broken the llvm-gcc bootstrap. Revert while I check. · a5149b5c
  Rafael Espindola authored May 27, 2011
```
llvm-svn: 132230
```
  a5149b5c
- Add a GR32_NOREX_NOSP register class and fix a bug where getMatchingSuperRegClass() · 75d99e4b
  Cameron Zwarich authored May 27, 2011
```
was saying that the matching superregister class of GR32_NOREX in GR64_NOREX_NOSP
is GR64_NOREX, which drops the NOSP constraint. This fixes PR10032.

llvm-svn: 132225
```
  75d99e4b
- Make size computation less brittle. · d23bfb8a
  Rafael Espindola authored May 27, 2011
```
llvm-svn: 132222
```
  d23bfb8a
May 27, 2011
- Don't use movw / movt for iOS static codegen for now to workaround some tools... · 518bcd0e
  Evan Cheng authored May 27, 2011
```
Don't use movw / movt for iOS static codegen for now to workaround some tools issues. rdar://9514789

llvm-svn: 132211
```
  518bcd0e
- Delete MethodBodies that only filtered reserved registers. · 60199449
  Jakob Stoklund Olesen authored May 27, 2011
```
The register allocators know to filter reserved registers from the allocation
orders, so we don't need all of this boilerplate.

llvm-svn: 132199
```
  60199449
- Fix a silly mistake (which trips over an assertion) in r132099. rdar://9515076 · fe84bd65
  Eli Friedman authored May 27, 2011
```
llvm-svn: 132194
```
  fe84bd65
- Remove DwarfRegNum from the individual bits of the condition register. · 0373d007
  Rafael Espindola authored May 27, 2011
```
These should be DW_OP_bit_piece of CR (64).

llvm-svn: 132192
```
  0373d007
- Remove DwarfRegNum from CARRY. I should be encoded with DW_OP_bit_piece. · ecb55730
  Rafael Espindola authored May 27, 2011
```
llvm-svn: 132190
```
  ecb55730
- Remove dwarf numbers from subregs. We should use DW_OP_bit_piece to · 2daba338
  Rafael Espindola authored May 27, 2011
```
refer to them.

I tested this with both check-all and the gdb testsuite.

llvm-svn: 132187
```
  2daba338
- Make the branch encoding for tBcc more obvious that it's a 4-byte opcode · 9b67db8e
  Eric Christopher authored May 27, 2011
```
followed by a conditional and imm8.

llvm-svn: 132179
```
  9b67db8e
- Fix comment. · bd59e893
  Eric Christopher authored May 27, 2011
```
llvm-svn: 132178
```
  bd59e893
- Renamed llvm.x86.sse42.crc32 intrinsics; crc64 doesn't exist. · b362884c
  Chad Rosier authored May 26, 2011
```
crc32.[8|16|32] have been renamed to .crc32.32.[8|16|32] and
crc64.[8|16|32] have been renamed to .crc32.64.[8|64].

llvm-svn: 132163
```
  b362884c
May 26, 2011
- Use MachineFrameInfo::hasCalls instead of MipsFunctionInfo::hasCall to check if · 077964a0
  Akira Hatanaka authored May 26, 2011
```
a function has any function calls.

llvm-svn: 132140
```
  077964a0
- Fix some dwarf register numbers. · e3a07a3b
  Rafael Espindola authored May 26, 2011
```
llvm-svn: 132136
```
  e3a07a3b
- Add support for C++ exception handling. · aa560006
  Akira Hatanaka authored May 26, 2011
```
llvm-svn: 132131
```
  aa560006
- Reorganize these slightly according to operand type. · 33a73c77
  Eric Christopher authored May 26, 2011
```
llvm-svn: 132128
```
  33a73c77
- Set HasSetDirective to true. · 8062bf36
  Akira Hatanaka authored May 26, 2011
```
llvm-svn: 132127
```
  8062bf36
- Reverting 132105: it broke some LLVM-GCC DejaGNU tests. · 493a12bf
  Stuart Hastings authored May 26, 2011
```
llvm-svn: 132108
```
  493a12bf
- Mark tBX as an indirect branch rather than a return. · 26ddb121
  Cameron Zwarich authored May 26, 2011
```
llvm-svn: 132107
```
  26ddb121
- Correctly handle a one-word struct passed byval on x86_64. · 276f231c
  Stuart Hastings authored May 26, 2011
```
rdar://problem/6920088

llvm-svn: 132105
```
  276f231c
- Rewrite fast-isel integer cast handling to handle more cases, and to be... · c7035519
  Eli Friedman authored May 25, 2011
```
Rewrite fast-isel integer cast handling to handle more cases, and to be simpler and more consistent.

The practical effects here are that x86-64 fast-isel can now handle trunc from i8 to i1, and ARM fast-isel can handle many more constructs involving integers narrower than 32 bits (including loads, stores, and many integer casts).

rdar://9437928 .

llvm-svn: 132099
```
  c7035519
- Define WeakRefDirective. · fa63d309
  Akira Hatanaka authored May 25, 2011
```
llvm-svn: 132098
```
  fa63d309
May 25, 2011
- Convert tBX_CALL / tBXr9_CALL to actual pseudoinstructions. · a946f476
  Cameron Zwarich authored May 25, 2011
```
llvm-svn: 132086
```
  a946f476
- Clean up comment a bit. · 8f2cd025
  Eric Christopher authored May 25, 2011
```
llvm-svn: 132083
```
  8f2cd025
- Implement the 'm' modifier. Note that it only works for memory operands. · 8c5e4192
  Eric Christopher authored May 25, 2011
```
Part of rdar://9119939

llvm-svn: 132081
```
  8c5e4192
- Remove MipsTargetLowering::LowerFP_TO_SINT. Patterns for fp_to_sint have already · f1412e4d
  Akira Hatanaka authored May 25, 2011
```
been defined in MipsInstrFPU.td.

llvm-svn: 132076
```
  f1412e4d
- Custom-lower FCOPYSIGN nodes. · 44eba3ac
  Akira Hatanaka authored May 25, 2011
```
llvm-svn: 132074
```
  44eba3ac
- Prepare ARMFastISel::SelectSIToFP for getRegForValue returning registers for i8 and i16 values. · 5bbb7565
  Eli Friedman authored May 25, 2011
```
llvm-svn: 132073
```
  5bbb7565
- Update MaxCallFrameSize regardless of the relocation model selected. · d72cc55f
  Akira Hatanaka authored May 25, 2011
```
llvm-svn: 132070
```
  d72cc55f
- Change initial value of MaxCallFrameSize. MipsFI::getMaxCallFrameSize() should · 92a26d4e
  Akira Hatanaka authored May 25, 2011
```
return 0 if there are no function calls made. 

llvm-svn: 132065
```
  92a26d4e
- Coding style fixes. Added comments. · 46662e0f
  Akira Hatanaka authored May 25, 2011
```
llvm-svn: 132063
```
  46662e0f
- Remove unused OpcodeMask enumerator. · 85ec5212
  Francois Pichet authored May 25, 2011
```
llvm-svn: 132062
```
  85ec5212
- Fix MSVC warning: "is out of range for enum constant" · 58b09c93
  Francois Pichet authored May 25, 2011
```
MSVC doesn't support 64 bit enum. 
OpcodeMask is not used anywhere in the code base.

llvm-svn: 132057
```
  58b09c93
- Restore an accidentally removed comment. · a51604e5
  Cameron Zwarich authored May 25, 2011
```
llvm-svn: 132044
```
  a51604e5
- Move some code to a more logical place. · 6b66ee18
  Cameron Zwarich authored May 25, 2011
```
llvm-svn: 132043
```
  6b66ee18
- Make tTAILJMPr/tTAILJMPrND emit a tBX without a preceding MOV of PC to LR. This · 3088e0a1
  Cameron Zwarich authored May 25, 2011
```
fixes <rdar://problem/9495913>

llvm-svn: 132042
```
  3088e0a1