llvm-svn: 44686

llvm-svn: 44676

llvm-svn: 44671

Remove a bogus optimization. It's not possible to do a move to low element to a <8 x i16> or <16 x i8> vector.

llvm-svn: 44669

Simpler and safer.

llvm-svn: 44663

llvm-svn: 44660

only disable it if we don't know it will be obviously profitable.
Still fixme, but less so. :)

llvm-svn: 44658

the X86 backend are needed before this should be enabled by default.

llvm-svn: 44657

_foo:
	movl	$12, %eax
	andl	4(%esp), %eax
	movl	_array(%eax), %eax
	ret

instead of:

_foo:
	movl	4(%esp), %eax
	shrl	$2, %eax
	andl	$3, %eax
	movl	_array(,%eax,4), %eax
	ret

As it turns out, this triggers all the time, in a wide variety of
situations, for example, I see diffs like this in various programs:

-       movl    8(%eax), %eax
-       shll    $2, %eax
-       andl    $1020, %eax
-       movl    (%esi,%eax), %eax
+       movzbl  8(%eax), %eax
+       movl    (%esi,%eax,4), %eax


-       shll    $2, %edx
-       andl    $1020, %edx
-       movl    (%edi,%edx), %edx
+       andl    $255, %edx
+       movl    (%edi,%edx,4), %edx

Unfortunately, I also see stuff like this, which can be fixed in the
X86 backend:

-       andl    $85, %ebx
-       addl    _bit_count(,%ebx,4), %ebp
+       shll    $2, %ebx
+       andl    $340, %ebx
+       addl    _bit_count(%ebx), %ebp

llvm-svn: 44656

llvm-svn: 44655

llvm-svn: 44654

llvm-svn: 44651

llvm-svn: 44650

llvm-svn: 44649

to create a JIT.  This lets you specify JIT-specific configuration items
like the JITMemoryManager to use.

llvm-svn: 44647

delete one ExecutionEngine ctor, minor cleanup.

llvm-svn: 44646

Fix for PR1831: if all defs of an interval are re-materializable, then it's a preferred spill candiate.

llvm-svn: 44644

If both result of the {s|z}xt and its source are live out, rewrite all uses of the source with result of extension.

llvm-svn: 44643

own JITMemoryManager interface.  There is no functionality change with 
this patch.

llvm-svn: 44640

llvm-svn: 44638

llvm-svn: 44637

- Fix typo in SPUCallingConv.td
- Credit myself for CellSPU work
- Add CellSPU to 'all' host target list

llvm-svn: 44627

not yet clear why, but in the meantime work around the
problem by making less use of readnone/readonly info.

llvm-svn: 44626

llvm-svn: 44623

llvm-svn: 44621

llvm-svn: 44620

llvm-svn: 44619

llvm-svn: 44614

llvm-svn: 44613

llvm-svn: 44612

llvm-svn: 44611

llvm-svn: 44610

llvm-svn: 44609

llvm-svn: 44608

llvm-svn: 44607

  This allows an important optimization to be re-enabled.
- If all uses / defs of a split interval can be folded, give the interval a
  low spill weight so it would not be picked in case spilling is needed (avoid
  pushing other intervals in the same BB to be spilled).

llvm-svn: 44601

the stored register is killed.

llvm-svn: 44600

compilation (no files missing). Test cases remain to be checked in.

llvm-svn: 44598

llvm-svn: 44597

llvm-svn: 44596