llvm-svn: 135906

llvm-svn: 135905

llvm-svn: 135904

llvm-svn: 135889

to eliminate some casting.

llvm-svn: 135888

llvm-svn: 135886

This fixes PR10463. A two-address instruction with an <undef> use
operand was incorrectly rewritten so the def and use no longer used the
same register, violating the tie constraint.

Fix this by always rewriting <undef> operands with the register a def
operand would use.

llvm-svn: 135885

llvm-svn: 135867

llvm-svn: 135866

llvm-svn: 135861

Frits for straightening me out.

llvm-svn: 135856

This method computes the edge bundles that should be live when splitting
around a compact region. This is independent of interference.

The function returns false if the live range was already a compact
region, or the compact region doesn't have any live bundles - it would
be the same as splitting around basic blocks.

Compact regions are computed using the normal spill placement code. We
pretend there is interference in all live-through blocks that don't use
the live range. This removes all edges from the Hopfield network used
for spill placement, so it converges instantly.

llvm-svn: 135847

If there is no interference and no last split point, we cannot
enterIntvBefore(Stop) - that function needs a real instruction.

Use enterIntvAtEnd instead for that very easy case.

This code doesn't currently run, it is needed by multi-way splitting.

llvm-svn: 135846

A split candidate can have a null PhysReg which means that it doesn't
map to a real interference pattern. Instead, pretend that all through
blocks have interference.

This makes it possible to generate compact regions where the live range
doesn't go through blocks that don't use it. The live range will still
be live between directly connected blocks with uses.

Splitting around a compact region tends to produce a live range with a
high spill weight, so it may evict a less dense live range.

llvm-svn: 135845

This method matches addLinks - All the listed blocks are considered to
have interference, so they add a negative bias to their bundles.

This could also be done by addConstraints, but that requires building a
separate BlockConstraint array.

llvm-svn: 135844

They always report 'no interference'.

llvm-svn: 135843

llvm-svn: 135842

llvm-svn: 135841

llvm-svn: 135838

llvm-svn: 135837

Turn the DenseSet in MCRegisterClass into a tblgenerated bit field. This should be faster and smaller.

Goodbye static ctors and dtors!

llvm-svn: 135836

This makes TargetRegisterClass slightly slower. Next step will be making contains faster.
Eventually TargetRegisterClass will be killed entirely.

llvm-svn: 135835

llvm-svn: 135833

llvm-svn: 135832

llvm-svn: 135831

removes its dependence on canonical induction variables.

llvm-svn: 135829

llvm-svn: 135828

llvm-svn: 135826

llvm-svn: 135825

The immediate is in the range 1-32, but is encoded as 0-31 in a 5-bit bitfield.
Update the representation such that we store the operand as 0-31, allowing us
to remove the encoder method and the special case handling in the disassembler.
Update the assembly parser and the instruction printer accordingly.

llvm-svn: 135823

so that a declaration for objc_retain is created when needed if it doesn't
already exist. rdar://9825114.

llvm-svn: 135821

llvm-svn: 135820

llvm-svn: 135819

llvm-svn: 135818

Tests for SMULBB, SMLALBT, SMLALTB, SMLALTT, and SMULL. Fix parsing of SMULLS.

llvm-svn: 135817

llvm-svn: 135816

InitializeX86MCInstrInfo, etc. are combined into InitializeX86TargetMC.

llvm-svn: 135812

llvm-svn: 135811

Add tests for SMLSD, SMLSDX, SMLSLD, SMLSLDX, SMMLA, SMMLAR, SMMLS, SMMLSR,
SMMUL, SMMULR, SMUAD and SMUADX.

llvm-svn: 135810

llvm-svn: 135809