when transfering between i64 gprs and mmx regs.

llvm-svn: 119931

llvm-svn: 119925

llvm-svn: 119923

void a(int x) { if (((1<<x)&8)==0) b(); }

into "x != 3", which occurs over 100 times in 403.gcc but in no
other program in llvm-test.

llvm-svn: 119922

llvm-svn: 119920

llvm-svn: 119918

llvm-svn: 119913

mode variables. Handle frame indexes in load/store and allocas again.

llvm-svn: 119912

to match the one from the load emitter above.

llvm-svn: 119911

llvm-svn: 119905

llvm-svn: 119904

so don't claim they are.  They are allocated using DAG.getNode, so attempts
to access MemSDNode fields results in reading off the end of the allocated
memory.  This fixes crashes with "llc -debug" due to debug code trying to
print MemSDNode fields for these barrier nodes (since the crashes are not
deterministic, use valgrind to see this).  Add some nasty checking to try
to catch this kind of thing in the future.

llvm-svn: 119901

llvm-svn: 119883

llvm-svn: 119882

llvm-svn: 119881

value that the one in ARMMCCodeEmitter.cpp does.

llvm-svn: 119878

llvm-svn: 119869

llvm-svn: 119868

llvm-svn: 119867

llvm-svn: 119866

llvm-svn: 119864

llvm-svn: 119863

llvm-svn: 119862

llvm-svn: 119861

asm parser can handle them.

llvm-svn: 119860

llvm-svn: 119859

llvm-svn: 119858

should give allow a wider range of addressing modes.

No functional change.

llvm-svn: 119856

llvm-svn: 119855

llvm-svn: 119852

llvm-svn: 119851

llvm-svn: 119850

initialize missing bit.

llvm-svn: 119849

llvm-svn: 119846

llvm-svn: 119844

llvm-svn: 119843

llvm-svn: 119841

llvm-svn: 119840

llvm-svn: 119821

llvm-svn: 119815