It broke several builds.

llvm-svn: 129557

llvm-svn: 129551

size of the clang binary in Debug builds from 690MB to 679MB.

llvm-svn: 129518

llvm-svn: 129517

This is done by pushing physical register definitions close to their
use, which happens to handle flag definitions if they're not glued to
the branch. This seems to be generally a good thing though, so I
didn't need to add a target hook yet.

The primary motivation is to generate code closer to what people
expect and rule out missed opportunity from enabling macro-op
fusion. As a side benefit, we get several 2-5% gains on x86
benchmarks. There is one regression:
SingleSource/Benchmarks/Shootout/lists slows down be -10%. But this is
an independent scheduler bug that will be tracked separately.
See rdar://problem/9283108.

Incidentally, pre-RA scheduling is only half the solution. Fixing the
later passes is tracked by:
<rdar://problem/8932804> [pre-RA-sched] on x86, attempt to schedule CMP/TEST adjacent with condition jump

Fixes:
<rdar://problem/9262453> Scheduler unnecessary break of cmp/jump fusion

llvm-svn: 129508

the alias".

llvm-svn: 129485

llvm-gcc-native-mingw32 builder.

llvm-svn: 129457

Passing unroll parameters (unroll-count, threshold, and partial unroll) via LoopUnroll class's ctor. Doing so 
will allow multiple context with different loop unroll parameters to run.  This is a minor change and no effect 
on existing application.

llvm-svn: 129449

llvm-svn: 129447

related tweaks to ExprMapKeyType.

llvm-svn: 129443

llvm-svn: 129441

llvm-svn: 129440

llvm-svn: 129439

llvm-svn: 129436

llvm-svn: 129435

Additional fixes:
Do something reasonable for subtargets with generic
itineraries by handle node latency the same as for an empty
itinerary. Now nodes default to unit latency unless an itinerary
explicitly specifies a zero cycle stage or it is a TokenFactor chain.

Original fixes:
UnitsSharePred was a source of randomness in the scheduler: node
priority depended on the queue data structure. I rewrote the recent
VRegCycle heuristics to completely replace the old heuristic without
any randomness. To make the ndoe latency adjustments work, I also
needed to do something a little more reasonable with TokenFactor. I
gave it zero latency to its consumers and always schedule it as low as
possible.

llvm-svn: 129421

llvm-svn: 129419

Implement the ones that were missing in the asm streamer.

llvm-svn: 129413

llvm-svn: 129403

Now that we have a first-class way to represent unaligned loads, the unaligned
load intrinsics are superfluous.

First part of <rdar://problem/8460511>.

llvm-svn: 129401

Add handling for tracking the relocations on symbols and resolving them.
Keep track of the relocations even after they are resolved so that if
the RuntimeDyld client moves the object, it can update the address and any
relocations to that object will be updated.

For our trival object file load/run test harness (llvm-rtdyld), this enables
relocations between functions located in the same object module. It should
be trivially extendable to load multiple objects with mutual references.

As a simple example, the following now works (running on x86_64 Darwin 10.6):


$ cat t.c
int bar() {
  return 65;
}

int main() {
  return bar();
}
$ clang t.c -fno-asynchronous-unwind-tables -o t.o -c
$ otool -vt t.o
t.o:
(__TEXT,__text) section
_bar:
0000000000000000  pushq %rbp
0000000000000001  movq  %rsp,%rbp
0000000000000004  movl  $0x00000041,%eax
0000000000000009  popq  %rbp
000000000000000a  ret
000000000000000b  nopl  0x00(%rax,%rax)
_main:
0000000000000010  pushq %rbp
0000000000000011  movq  %rsp,%rbp
0000000000000014  subq  $0x10,%rsp
0000000000000018  movl  $0x00000000,0xfc(%rbp)
000000000000001f  callq 0x00000024
0000000000000024  addq  $0x10,%rsp
0000000000000028  popq  %rbp
0000000000000029  ret
$ llvm-rtdyld t.o -debug-only=dyld ; echo $?
Function sym: '_bar' @ 0
Function sym: '_main' @ 16
Extracting function: _bar from [0, 15]
    allocated to 0x100153000
Extracting function: _main from [16, 41]
    allocated to 0x100154000
Relocation at '_main' + 16 from '_bar(Word1: 0x2d000000)
Resolving relocation at '_main' + 16 (0x100154010) from '_bar (0x100153000)(pcrel, type: 2, Size: 4).
loaded '_main' at: 0x100154000
65
$

llvm-svn: 129388

llvm-svn: 129378

llvm-svn: 129362

llvm-svn: 129361

Use debug info in the IR to find the directory/file:line:col. Each time that location changes, bump a counter.

Unlike the existing profiling system, we don't try to look at argv[], and thusly don't require main() to be present in the IR. This matches GCC's technique where you specify the profiling flag when producing each .o file.

The runtime library is minimal, currently just calling printf at program shutdown time. The API is designed to make it possible to emit GCOV data later on.

llvm-svn: 129340

Also document that the global variables produced are mergable.

llvm-svn: 129330

llvm-svn: 129328

has some bugs.  If this is interesting functionality, it should be 
reimplemented in the argpromotion pass.

llvm-svn: 129314

llvm-svn: 129293

disassembler API.  Hooked this up to the ARM target so such tools as Darwin's
otool(1) can now print things like branch targets for example this:
  blx _puts
instead of this:
  blx #-36
And even print the expression encoded in the Mach-O relocation entried for
things like this:
  movt r0, :upper16:((_foo-_bar)+1234)

llvm-svn: 129284

was always a User.

llvm-svn: 129272

llvm-svn: 129271

--- Reverse-merging r129235 into '.':
D    test/Feature/bb_attrs.ll
U    include/llvm/BasicBlock.h
U    include/llvm/Bitcode/LLVMBitCodes.h
U    lib/VMCore/AsmWriter.cpp
U    lib/VMCore/BasicBlock.cpp
U    lib/AsmParser/LLParser.cpp
U    lib/AsmParser/LLLexer.cpp
U    lib/AsmParser/LLToken.h
U    lib/Bitcode/Reader/BitcodeReader.cpp
U    lib/Bitcode/Writer/BitcodeWriter.cpp

llvm-svn: 129259

* Add a "landing pad" attribute to the BasicBlock.
* Modify the bitcode reader and writer to handle said attribute.

Later: The verifier will ensure that the landing pad attribute is used in the
appropriate manner. I.e., not applied to the entry block, and applied only to
basic blocks that are branched to via a `dispatch' instruction.

(This is a work-in-progress.)

llvm-svn: 129235

isEqual of its members, not operator==.

llvm-svn: 129233

it's completely safe to cache the AST across LICM runs even with this fix,
but this fix can't hurt.

llvm-svn: 129198

where we shrunk the list without updating the end iterator.
By inspection, from PR9639.  

llvm-svn: 129190

It is common for large live ranges to have few basic blocks with register uses
and many live-through blocks without any uses. This approach grows the Hopfield
network incrementally around the use blocks, completely avoiding checking
interference for some through blocks.

llvm-svn: 129188

llvm-svn: 129186

Change -arm-trap-func= into a non-arm specific option. Now Intrinsic::trap is lowered into a call to the specified trap function at sdisel time.

llvm-svn: 129152