llvm-svn: 116069

llvm-svn: 116068

llvm-svn: 116030

llvm-svn: 116018

llvm-svn: 115994

llvm-svn: 115986

llvm-svn: 115973

llvm-svn: 115923

llvm-svn: 115890

llvm-svn: 115884

llvm-svn: 115841

as the operator of the dag.  Specifically, this allows parsing things
like (F.x 4) in addition to just (a 4).

Unfortunately, this runs afoul of an idiom being used by llvmc.  It
is using dags like (foo [1,2,3]) to represent a list of stuff being
passed into foo.  With this change, this is parsed as a [1,2,3] 
subscript on foo instead of being the first argument to the dag.
Cope with this in the short term by requiring a "-llvmc-temp-hack"
argument to tblgen to get the old parsing behavior.

llvm-svn: 115742

llvm-svn: 115739

where !cast is just as short.

llvm-svn: 115722

!strconcat(!strconcat(!strconcat(!strconcat

Simplify some x86 td files to use it.

llvm-svn: 115719

tried (but failed) to artificially constrain it to working with #NAME#.
Just allow any # in identifiers, and update the comments.

llvm-svn: 115704

simplify the X86 CMOVmr's.

llvm-svn: 115702

llvm-svn: 115664

llvm-svn: 115624

llvm-svn: 115616

instruction forms.  Now the ENTER instruction
disassembles correctly.

llvm-svn: 115573

llvm-svn: 115348

The x86_mmx type is used for MMX intrinsics, parameters and
return values where these use MMX registers, and is also
supported in load, store, and bitcast.

Only the above operations generate MMX instructions, and optimizations
do not operate on or produce MMX intrinsics. 

MMX-sized vectors <2 x i32> etc. are lowered to XMM or split into
smaller pieces.  Optimizations may occur on these forms and the
result casted back to x86_mmx, provided the result feeds into a
previous existing x86_mmx operation.

The point of all this is prevent optimizations from introducing
MMX operations, which is unsafe due to the EMMS problem.

llvm-svn: 115243

or not. TableGen needs to generate the printInstruction() function as taking
an MCInstr* or a MachineInstr*, depending. Default to the old non-MC
version so that everything not yet using MC continues to just work without
fidding.

llvm-svn: 115126

pipeline forwarding path.

llvm-svn: 115098

llvm-svn: 115096

operands.

With this done, we can remove the _Int suffixes from the round instructions
without the disassembler blowing up.  This allows the assembler to support
them, implementing rdar://8456376 - llvm-mc rejects 'roundss'

llvm-svn: 115019

llvm-svn: 115005

llvm-svn: 114847

llvm-svn: 114750

reflection, this isn't going to achieve the purpose I intended it for.  Back to the drawing board!

llvm-svn: 114710

Not intended functionality change, as nothing uses this yet.

llvm-svn: 114702

llvm-svn: 114659

Explicitly cast arguments to the type the builtin expects, which is <vN x i8>

llvm-svn: 114596

that complex patterns are matched after the entire pattern has
a structural match, therefore the NodeStack isn't in a useful
state when the actual call to the matcher happens.

llvm-svn: 114489

matched, allow ComplexPatterns to opt into getting the parent node
of the operand being matched.

llvm-svn: 114472

passed the root of the match, even though only a few patterns
actually needed this (one in X86, several in ARM [which should
be refactored anyway], and some in CellSPU that I don't feel 
like detangling).   Instead of requiring all ComplexPatterns to
take the dead root, have targets opt into getting the root by
putting SDNPWantRoot on the ComplexPattern.

llvm-svn: 114471

llvm-svn: 114435

llvm-svn: 114433

llvm-svn: 114293