- Sep 07, 2011
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Jakob Stoklund Olesen authored
In some cases such as interpreters using indirectbr, the CFG can be very complicated, and live range splitting may be forced to insert a large number of phi-defs. When that happens, traceSiblingValue can spend a lot of time zipping around in the CFG looking for defs and reloads. This patch causes more information to be cached in SibValues, and the cached values are used to terminate searches early. This speeds up spilling by 20x in one interpreter test case. For more typical code, this is just a 10% speedup of spilling. llvm-svn: 139247
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Eli Friedman authored
Fix atomic load and store on x86 to pass -verify-machineinstrs (and possibly fix some subtle bugs involving passes which check mayStore()). This isn't exactly ideal, but it is good enough for the moment. llvm-svn: 139245
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Jim Grosbach authored
llvm-svn: 139244
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Jim Grosbach authored
There is no 16-bit wide encoding, so the .w suffix isn't needed (indeed, isn't documented as allowed). Also add the missing '!' token on the _UPD variant. llvm-svn: 139243
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Jim Grosbach authored
Choose 32-bit vs. 16-bit encoding when there's no .w suffix in post-processing as match classes are insufficient to handle the context-sensitiveness of the writeback operand's legality for the 16-bit encodings. llvm-svn: 139242
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Owen Anderson authored
llvm-svn: 139240
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James Molloy authored
Refactor instprinter and mcdisassembler to take a SubtargetInfo. Add -mattr= handling to llvm-mc. Reviewed by Owen Anderson. llvm-svn: 139237
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Duncan Sands authored
duplicate tests are eliminated (for example if the two functions both have a catch clause catching the same type, ensure the redundant one is removed). Note that it would probably be safe to say that eh.typeid.for is 'const', but since two calls to it with the same argument can give different results (but only if the calls are in different functions), it seems more correct to mark it only 'pure'; this doesn't get in the way of the optimization. llvm-svn: 139236
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Jim Grosbach authored
Handle explicit 'ia' suffix via a MnemonicAlias (pre-existing). llvm-svn: 139234
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Rafael Espindola authored
(not assert) early. llvm-svn: 139233
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Jim Grosbach authored
llvm-svn: 139232
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Duncan Sands authored
llvm-svn: 139230
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Duncan Sands authored
llvm-svn: 139229
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Eli Friedman authored
Relax the MemOperands on atomics a bit. Fixes -verify-machineinstrs failures for atomic laod/store on ARM. (The fix for the related failures on x86 is going to be nastier because we actually need Acquire memoperands attached to the atomic load instrs, etc.) llvm-svn: 139221
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Joerg Sonnenberger authored
name. llvm-svn: 139220
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Devang Patel authored
While sinking machine instructions, sink matching DBG_VALUEs also otherwise live debug variable pass will drop DBG_VALUEs on the floor. llvm-svn: 139208
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Bill Wendling authored
information for older linkers. llvm-svn: 139206
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Owen Anderson authored
llvm-svn: 139205
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Owen Anderson authored
Fixes PR10872 and <rdar://problem/10065079>. llvm-svn: 139204
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Jim Grosbach authored
llvm-svn: 139202
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Jim Grosbach authored
llvm-svn: 139200
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Jim Grosbach authored
llvm-svn: 139199
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Jim Grosbach authored
llvm-svn: 139194
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Jim Grosbach authored
llvm-svn: 139193
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Nick Lewycky authored
these tests all infinitely recurse, bringing my system down into swapping hell. llvm-svn: 139192
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Jim Grosbach authored
llvm-svn: 139191
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- Sep 06, 2011
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Jim Grosbach authored
llvm-svn: 139188
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Nick Lewycky authored
handle anything more complex. Fixes PR10383 again! llvm-svn: 139186
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Eli Friedman authored
llvm-svn: 139179
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Jim Grosbach authored
llvm-svn: 139177
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Jim Grosbach authored
llvm-svn: 139172
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Owen Anderson authored
llvm-svn: 139171
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Andrew Trick authored
llvm-svn: 139169
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Jim Grosbach authored
llvm-svn: 139168
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Rafael Espindola authored
llvm-svn: 139161
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Duncan Sands authored
with a vector condition); such selects become VSELECT codegen nodes. This patch also removes VSETCC codegen nodes, unifying them with SETCC nodes (codegen was actually often using SETCC for vector SETCC already). This ensures that various DAG combiner optimizations kick in for vector comparisons. Passes dragonegg bootstrap with no testsuite regressions (nightly testsuite as well as "make check-all"). Patch mostly by Nadav Rotem. llvm-svn: 139159
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Evan Cheng authored
Now the 'S' instructions, e.g. ADDS, treat S bit as optional operand as well. Also fix isel hook to correctly set the optional operand. rdar://10073745 llvm-svn: 139157
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Devang Patel authored
llvm-svn: 139156
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Jim Grosbach authored
Even if there's no mode switch performed, the .code directive should still be sent to the output streamer. Otherwise, for example, an output asm stream is not equivalent to the input stream which generated it (a dependency on the input target triple arm vs. thumb is introduced which was not originally there). llvm-svn: 139155
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Rafael Espindola authored
llvm-svn: 139154
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