llvm-svn: 28417

the TableGen generated code since the load's chain result is read by
the callseq_start node.

llvm-svn: 28416

This is part of the on-going work on PR 761.

llvm-svn: 28414

llvm-svn: 28409

llvm-svn: 28401

llvm-svn: 28400

llvm-svn: 28399

llvm-svn: 28397

currently...

llvm-svn: 28393

- Fix a couple of minor bugs in i16immSExt8 and i16immZExt8.
- Added loadiPTR fragment used for indirect jumps and calls.

llvm-svn: 28392

llvm-svn: 28390

llvm-svn: 28383

llvm-svn: 28381

llvm-svn: 28378

llvm-svn: 28371

llvm-svn: 28370

llvm-svn: 28368

llvm-svn: 28357

llvm-svn: 28356

arguments at once.

llvm-svn: 28327

llvm-svn: 28326

llvm-svn: 28324

it doesn't currently use/maintain the chain properly.  Also, make the
X86ISelLowering.cpp file 80-col clean.

llvm-svn: 28320

llvm-svn: 28266

llvm-svn: 28265

llvm-svn: 28261

TargetData.h.  This should make recompiles a bit faster with my current
TargetData tinkering.

llvm-svn: 28238

llvm-svn: 28223

llvm-svn: 28199

Implement MASM sections correctly, without a "has masm sections flag" and a bunch of special case code.

llvm-svn: 28194

llvm-svn: 28190

llvm-svn: 28187

it wants it emitted to _text/_data.

llvm-svn: 28185

llvm-svn: 28184

llvm-svn: 28177

llvm-svn: 28176

movw. That is we promote the destination operand to r16. So
        %CH = TRUNC_R16_R8 %BP
is emitted as
        movw %bp, %cx.

This is incorrect. If %cl is live, it would be clobbered.
Ideally we want to do the opposite, that is emitted it as
        movb ??, %ch
But this is not possible since %bp does not have a r8 sub-register.

We are now defining a new register class R16_ which is a subclass of R16
containing only those 16-bit registers that have r8 sub-registers (i.e.
AX - DX). We isel the truncate to two instructions, a MOV16to16_ to copy the
value to the R16_ class, followed by a TRUNC_R16_R8.

Due to bug 770, the register colaescer is not going to coalesce between R16 and
R16_. That will be fixed later so we can eliminate the MOV16to16_. Right now, it
can only be eliminated if we are lucky that source and destination registers are
the same.

llvm-svn: 28164

llvm-svn: 28158

llvm-svn: 28148

llvm-svn: 28139