llvm-svn: 121652

MBlaze delay slot filler was not capable of using ADDK and variants to fill delay slots. This broke several test cases when 121649 was committed. This fixes the regression.

llvm-svn: 121650

The ADD and ADDK (and all variants) instructions where flip-flopped in the MBlaze backend. This bug fix makes 64-bit math work on the MBlaze backend.

llvm-svn: 121649

2. Make sure that the MBlaze stack is aligned to 4-byte boundaries.
3. Determine frame indexes that should be placed in the callers stack frame, as per the MBlaze ABI, and place them in the correct locations.

llvm-svn: 121639

(x & 2^n) ? 2^m+C : C

we can offset both arms by C to get the "(x & 2^n) ? 2^m : 0" form, optimize the
select to a shift and apply the offset afterwards.

llvm-svn: 121609

to catch cases where n != m with a shift.

llvm-svn: 121608

llvm-svn: 121606

llvm-svn: 121598

llvm-svn: 121593

llvm-svn: 121588

llvm-svn: 121587

declared. Add a note specifying this and spruce up the list a bit.

llvm-svn: 121586

llvm-svn: 121585

llvm-svn: 121583

llvm-svn: 121582

llvm-svn: 121581

llvm-svn: 121580

llvm-svn: 121579

llvm-svn: 121525

llvm-svn: 121524

just assign to it.

llvm-svn: 121523

llvm-svn: 121522

llvm-svn: 121521

Alignments smaller than the total size of the memory being loaded or stored,
unless the alignment is 8 bytes, are not allowed.  Add tests for this, too.

llvm-svn: 121506

instructions to restore a single register rather than an LDM instruction.
rdar://8754999

llvm-svn: 121498

llvm-svn: 121496

llvm-svn: 121493

llvm-svn: 121471

llvm-svn: 121462

llvm-svn: 121461

llvm-svn: 121454

llvm-svn: 121450

llvm-svn: 121445

Formalize the notion that AVX and SSE are non-overlapping extensions from the compiler's point of view.  Per email discussion, we either want to always use VEX-prefixed instructions or never use them, and are taking "HasAVX" to mean "Always use VEX".  Passing -mattr=-avx,+sse42 should serve to restore legacy SSE support when desirable.

llvm-svn: 121439

f:
        .cfi_startproc
        nop
        .cfi_endproc

assembled (on ELF).

llvm-svn: 121434

t_addrmode_s# address modes is used for ASM printing, not for encoding.
<rdar://problem/8745375>

llvm-svn: 121417

llvm-svn: 121415

Use the new IsAligned fixup flag to improve fixup encodings for Thumb2 branches.  This is still not perfect,
but it gets many more of them correct than it did previously.

llvm-svn: 121414

Fix an issue in some Thumb fixups, where the effective PC address needs to be 4-byte aligned when calculating
the offset.  Add a new fixup flag to represent this, and use it for the one fixups that I have a testcase for needing
this.  It's quite likely that the other Thumb fixups will need this too, and to have their fixup encoding logic
adjusted accordingly.

llvm-svn: 121408

llvm-svn: 121404