Commits · bb49e721b8c54a57219c55174f15e2b2cdd22de4 · Roger Ferrer / llvm-epi-0.8

Sep 21, 2011
- Change the names of functions isMips* to hasMips*. · bb49e721
  Akira Hatanaka authored Sep 20, 2011
```
llvm-svn: 140214
```
  bb49e721
- Revert r140097, working on a better approach · 8058234b
  Bruno Cardoso Lopes authored Sep 20, 2011
```
llvm-svn: 140203
```
  8058234b
- Simplify max/minp[s|d] dagcombine matching · f7638e1e
  Bruno Cardoso Lopes authored Sep 20, 2011
```
llvm-svn: 140199
```
  f7638e1e
Sep 20, 2011
- Tidy up a bit more, fix tab and remove trailing whitespaces · 60aa85b6
  Bruno Cardoso Lopes authored Sep 20, 2011
```
llvm-svn: 140186
```
  60aa85b6
- The wrong relocation was being emitted for several SSSE3 instructions. · 33e91a6c
  Bruno Cardoso Lopes authored Sep 20, 2011
```
This fixes PR10963. Thanks to Benjamin for finding the wrong tablegen
declaration.

llvm-svn: 140184
```
  33e91a6c
- Tidy up code! · 05f3f493
  Bruno Cardoso Lopes authored Sep 20, 2011
```
llvm-svn: 140183
```
  05f3f493
- Fix a bug introduced during refactoring a couple of months ago. Cortex-M3 does... · 61a00331
  Evan Cheng authored Sep 20, 2011
```
Fix a bug introduced during refactoring a couple of months ago. Cortex-M3 does not support Thumb2 dsp instructions. rdar://10152911.

llvm-svn: 140181
```
  61a00331
- Initial Mips64 support. Patch by Liu with some modifications. · 2b37261f
  Akira Hatanaka authored Sep 20, 2011
```
llvm-svn: 140178
```
  2b37261f
- Restore hasPostISelHook tblgen flag. · 52363bdb
  Andrew Trick authored Sep 20, 2011
```
No functionality change. The hook makes it explicit which patterns
require "special" handling. i.e. it self-documents tblgen
deficiencies. I plan to add verification in ExpandISelPseudos and
Thumb2SizeReduce to catch any missing hasPostISelHooks. Otherwise it's
too fragile.

llvm-svn: 140160
```
  52363bdb
- Extend changes from r139986 to produce 256-bit AVX minps/minpd/maxps/maxpd. · 68c92d86
  Craig Topper authored Sep 20, 2011
```
llvm-svn: 140140
```
  68c92d86
- ARM isel bug fix for adds/subs operands. · 8586e62d
  Andrew Trick authored Sep 20, 2011
```
Modified ARMISelLowering::AdjustInstrPostInstrSelection to handle the
full gamut of CPSR defs/uses including instructins whose "optional"
cc_out operand is not really optional. This allowed removal of the
hasPostISelHook to simplify the .td files and make the implementation
more robust.
Fixes rdar://10137436: sqlite3 miscompile

llvm-svn: 140134
```
  8586e62d
- whitespace · 53df4b6d
  Andrew Trick authored Sep 20, 2011
```
llvm-svn: 140133
```
  53df4b6d
- Thumb2 assembly parsing and encoding for UXTAB/UXTAB16/UXTH/UXTB/UXTB16/UXTH. · b3519802
  Jim Grosbach authored Sep 20, 2011
```
llvm-svn: 140125
```
  b3519802
- Thumb2 assembly parsing and encoding for USAX. · 716f1739
  Jim Grosbach authored Sep 20, 2011
```
llvm-svn: 140119
```
  716f1739
- Remove incorrect comments. These are not disassmebly only patterns. · 691389c9
  Jim Grosbach authored Sep 20, 2011
```
llvm-svn: 140116
```
  691389c9
- Thumb2 assembly parsing and encoding for UQASX/UQSAX. · 62f8eee0
  Jim Grosbach authored Sep 20, 2011
```
llvm-svn: 140111
```
  62f8eee0
- Thumb1 convenience aliases for disassembler round-trip testing. CPS instruction. · 08a47806
  Jim Grosbach authored Sep 20, 2011
```
llvm-svn: 140108
```
  08a47806
- Thumb CPS definition is not disassembler only. · 4da03f00
  Jim Grosbach authored Sep 20, 2011
```
llvm-svn: 140106
```
  4da03f00
- Thumb2 range check on CPS mode immediate. · d9846bbc
  Jim Grosbach authored Sep 19, 2011
```
llvm-svn: 140105
```
  d9846bbc
- tMOVSr is not allowed in an IT block either. · 163be01d
  Owen Anderson authored Sep 19, 2011
```
llvm-svn: 140104
```
  163be01d
- CPS instructions are UNPREDICTABLE inside IT blocks. · 61e4604d
  Owen Anderson authored Sep 19, 2011
```
llvm-svn: 140102
```
  61e4604d
- Tidy up comments. · fbb44810
  Jim Grosbach authored Sep 19, 2011
```
llvm-svn: 140099
```
  fbb44810
- Fix PR10949. Fix the encoding of VMOVPQIto64rr. · c4398d2c
  Bruno Cardoso Lopes authored Sep 19, 2011
```
llvm-svn: 140098
```
  c4398d2c
- Based on the small opt Zvi's patch was trying to achieve, eliminate · 51792dcc
  Bruno Cardoso Lopes authored Sep 19, 2011
```
128-bit undef subvector insertion into a 256-bit vector

llvm-svn: 140097
```
  51792dcc
- Thumb2 assembly parsing and encoding for UMAAL/UMLAL/UMULL. · fc545183
  Jim Grosbach authored Sep 19, 2011
```
llvm-svn: 140095
```
  fc545183
- Thumb2 assembly parsing and encoding for UHASX/UHSAX. · 15d97fd8
  Jim Grosbach authored Sep 19, 2011
```
llvm-svn: 140088
```
  15d97fd8
- Thumb2 assembly parsing and encoding for UASX. · a6e6504e
  Jim Grosbach authored Sep 19, 2011
```
llvm-svn: 140085
```
  a6e6504e
- Thumb2 TBB and TBH instructions are only allowed at the end of IT blocks, not in the middle. · f902d92f
  Owen Anderson authored Sep 19, 2011
```
llvm-svn: 140079
```
  f902d92f
- Thumb2 assembly parsing and encoding for TBB/TBH. · 05541f45
  Jim Grosbach authored Sep 19, 2011
```
llvm-svn: 140078
```
  05541f45
Sep 19, 2011
- Match X86ISD::FSETCCsd and X86ISD::FSETCCss while in AVX mode. This fix · d4a3d452
  Bruno Cardoso Lopes authored Sep 19, 2011
```
PR10955 and PR10948.

llvm-svn: 140069
```
  d4a3d452
- Tidy up a bit. · 1a23fbb9
  Jim Grosbach authored Sep 19, 2011
```
llvm-svn: 140050
```
  1a23fbb9
- Thumb2 assembly parsing and encoding for SXTB/SXTB16/SXTH. · 82213197
  Jim Grosbach authored Sep 19, 2011
```
llvm-svn: 140047
```
  82213197
- Make changes to avoid creating nested CALLSEQ_START/END constructs, which aren't · 79738336
  Akira Hatanaka authored Sep 19, 2011
```
yet legal according to comments in LegalizeDAG.cpp:227. 

Memcpy nodes created for copying byval arguments are inserted before
CALLSEQ_START.

The two failing tests reported in PR10876 pass after applying this patch.  

llvm-svn: 140046
```
  79738336
- Specify an additional fixed bit in the Thumb2 SSAT encoding to prevent the... · 8c021d85
  Owen Anderson authored Sep 19, 2011
```
Specify an additional fixed bit in the Thumb2 SSAT encoding to prevent the decoder from emitting gibberish for this invalid encoding.

llvm-svn: 140041
```
  8c021d85
- ARM asm parsing should handle pre-indexed writeback w/o immediate. · 40700e09
  Jim Grosbach authored Sep 19, 2011
```
For example, 'ldrb r9, [sp]!' is odd, but valid.

llvm-svn: 140035
```
  40700e09
- Handle STRT (and friends) like LDRT (and friends) for decoding purposes. Port... · ddfcec92
  Owen Anderson authored Sep 19, 2011
```
Handle STRT (and friends) like LDRT (and friends) for decoding purposes.  Port over additional encoding tests to decoding tests.

llvm-svn: 140032
```
  ddfcec92
- Thumb2 assembly parsing and encoding for SXTAB/SXTAB16/SXTAH. · 264abdec
  Jim Grosbach authored Sep 19, 2011
```
llvm-svn: 140029
```
  264abdec
Sep 18, 2011
- Fix typos in my prev commit, found by Tobi. · 763c11cc
  Nadav Rotem authored Sep 18, 2011
```
llvm-svn: 140003
```
  763c11cc
- setOperationAction should be done on the return value of the type, not the operands. · 261a10a0
  Nadav Rotem authored Sep 18, 2011
```
llvm-svn: 140001
```
  261a10a0
- When promoting integer vectors we often create ext-loads. This patch adds a · 7ae11279
  Nadav Rotem authored Sep 18, 2011
```
dag-combine optimization to implement the ext-load efficiently (using shuffles).

For example the type <4 x i8> is stored in memory as i32, but it needs to
find its way into a <4 x i32> register. Previously we scalarized the memory
access, now we use shuffles.

llvm-svn: 139995
```
  7ae11279