Fix build breakage.

llvm-svn: 121596

llvm-svn: 121595

lib/CodeGen/RegAllocGreedy.cpp:233: error: unused variable 'TRC' [-Wunused-variable]

llvm-svn: 121594

llvm-svn: 121593

The 64-bit element vectors need to be handled as a special case.

llvm-svn: 121592

Soon, RegAllocGreedy will start splitting live ranges, and then deferred
spilling won't work anyway.

llvm-svn: 121591

The spiller should only spill. The register allocator will drive live range
splitting, it has the needed information about register pressure and
interferences.

llvm-svn: 121590

llvm-svn: 121589

llvm-svn: 121588

llvm-svn: 121587

declared. Add a note specifying this and spruce up the list a bit.

llvm-svn: 121586

llvm-svn: 121585

llvm-svn: 121584

llvm-svn: 121583

llvm-svn: 121582

llvm-svn: 121581

llvm-svn: 121580

llvm-svn: 121579

llvm-svn: 121573

test class.

llvm-svn: 121538

llvm-svn: 121525

llvm-svn: 121524

just assign to it.

llvm-svn: 121523

llvm-svn: 121522

llvm-svn: 121521

llvm-svn: 121520

interference check.

llvm-svn: 121519

llvm-svn: 121518

llvm-svn: 121517

llvm-svn: 121516

llvm-svn: 121515

llvm-svn: 121514

llvm-svn: 121513

llvm-svn: 121512

operator names.

llvm-svn: 121511

llvm-svn: 121510

Most Neon shift intrinsics do not have variants for polynomial types, but
vsri_n and vsli_n do support them, and we need to properly range-check the
shift immediates for them.

llvm-svn: 121509

llvm-svn: 121508

AliasAnalysis consumers, PartialAlias will be treated as MayAlias.

For AliasAnalysis chaining, MayAlias says "procede to the next analysis".
PartialAlias will be used to indicate that the query should terminate,
even though it didn't reach MustAlias or NoAlias.

llvm-svn: 121507

Alignments smaller than the total size of the memory being loaded or stored,
unless the alignment is 8 bytes, are not allowed.  Add tests for this, too.

llvm-svn: 121506