- Add 'UseSSEx' to force SSE legacy insn not being selected when AVX is
  enabled.

  As the penalty of inter-mixing SSE and AVX instructions, we need
  prevent SSE legacy insn from being generated except explicitly
  specified through some intrinsics. For patterns supported by both
  SSE and AVX, so far, we force AVX insn will be tried first relying on
  AddedComplexity or position in td file. It's error-prone and
  introduces bugs accidentally.

  'UseSSEx' is disabled when AVX is turned on. For SSE insns inherited
  by AVX, we need this predicate to force VEX encoding or SSE legacy
  encoding only.

  For insns not inherited by AVX, we still use the previous predicates,
  i.e. 'HasSSEx'. So far, these insns fall into the following
  categories:
  * SSE insns with MMX operands
  * SSE insns with GPR/MEM operands only (xFENCE, PREFETCH, CLFLUSH,
    CRC, and etc.)
  * SSE4A insns.
  * MMX insns.
  * x87 insns added by SSE.

2 test cases are modified:

 - test/CodeGen/X86/fast-isel-x86-64.ll
   AVX code generation is different from SSE one. 'vcvtsi2sdq' cannot be
   selected by fast-isel due to complicated pattern and fast-isel
   fallback to materialize it from constant pool.

 - test/CodeGen/X86/widen_load-1.ll
   AVX code generation is different from SSE one after fixing SSE/AVX
   inter-mixing. Exec-domain fixing prefers 'vmovapd' instead of
   'vmovaps'.

llvm-svn: 162919

llvm-svn: 162918

llvm-svn: 162917

[Tobias von Koch] What's happening here is that the CR6SET/CR6UNSET is breaking the chain of register copies glued to the function call (BL_SVR4 node). The scheduler then moves other instructions in between those and the function call, which isn't good!

Right. That's the case where there is no chain of register copies before the call, so InFlag == 0... Attached is a new revision of the patch which should fix this for good.

llvm-svn: 162916

llvm-svn: 162915

llvm-svn: 162914

llvm-svn: 162913

The old PHI updating code in loop-rotate was replaced with SSAUpdater a while
ago, it has no problems with comples PHIs. What had to be fixed is detecting
whether a loop was already rotated and updating dominators when multiple exits
were present.

This change increases overall code size a bit, mostly due to additional loop
unrolling opportunities. Passes test-suite and selfhost with -verify-dom-info.
Fixes PR7447.

Thanks to Andy for the input on the domtree updating code.

llvm-svn: 162912

llvm-svn: 162911

When a MachineInstr is constructed, its implicit operands are added
first, then the explicit operands are inserted before the implicits.

MCInstrDesc has oprand flags like early clobber and operand ties that
apply to the explicit operands.

Don't look at those flags when the implicit operands are first added in
the explicit operands's positions.

llvm-svn: 162910

llvm-svn: 162909

llvm-svn: 162908

llvm-svn: 162907

within its own argument list. The original definition is used for the immediate
expansion, but the new definition is used for any subsequent occurences within
the argument list or after the expansion.

llvm-svn: 162906

llvm-svn: 162905

be filled in; they won't if the lambda's declarator has an invalid type. Instead
take the parameters from the declarator directly.

llvm-svn: 162904

This isn't perfect but avoids overlap of the menu and the content.

llvm-svn: 162903

llvm-svn: 162902

This includes:
  - The isl_id of the domain of the scattering must be copied from the original
    domain
  - Remove outdated references to a 'FinalRead' statement
  - Print of the Pocc output, if -debug is provided.
  - Add line breaks to some error messages.

Reported and Debugged by:  Dustin Feld  <d3.feld@gmail.com>

llvm-svn: 162901

llvm-svn: 162900

because C always rounds towards zero.

Thanks Dirk and Ben.

llvm-svn: 162899

llvm-svn: 162898

llvm-svn: 162897

llvm-svn: 162896

code and allow better code reuse. Make the code a bit more conforming
to LLVM code style.
No functionality change.

llvm-svn: 162895

Add FMA to switch statement in VectorLegalizer::LegalizeOp so that it can be expanded when it isn't legal.

llvm-svn: 162894

llvm-svn: 162893

llvm-svn: 162892

support the '-analyzer-config key=val' variant.

llvm-svn: 162891

Also update the tests that rely on c++98 to explicitly mention that.

llvm-svn: 162890

passing additional parameters to a tool.

Use this to fix a FIXME in testing code.

llvm-svn: 162889

llvm-svn: 162888

llvm-svn: 162887

llvm-svn: 162886

llvm-svn: 162885

This improves compatibility with gcc in this regard, and this file generation
can be ameliorated with GCOV_PREFIX and GCOV_PREFIX_STRIP. It's also useful if
your build directory doesn't specify -o <abspath> and it uses a recursive make
structure, so it's not relative to the toplevel.

Patch by Joshua Cranmer!
<rdar://problem/12179524>

llvm-svn: 162884

llvm-svn: 162883

Changes the hash result for strings containing characters
with values >= 128, such as UTF8 strings (not normal ASCII).

Changed mostly so we match other implementations.

llvm-svn: 162882

- The root cause is that target constant materialization in X86 fast-isel
  creates a PC-rel addressing which may overflow 32-bit range in non-Small code
  model if .rodata section is allocated too far away from code segment in
  MCJIT, which uses Large code model so far.
- Follow the similar logic to fix non-Small code model in fast-isel by skipping
  non-Small code model.

llvm-svn: 162881

llvm-svn: 162880