llvm-svn: 125498

llvm-svn: 125497

Fix edge case where we don't cull warnings in IdempotentOperationsChecker due to incomplete analysis of loops.

llvm-svn: 125495

Use 'BitVector' instead of SmallPtrSet<CFGBlock*> in IdempotentOperationsChecker.  No real functionality change.

llvm-svn: 125494

llvm-svn: 125493

headers in C++0x mode.  Fixes PR9138.

Patch by John Bytheway!

llvm-svn: 125492

llvm-svn: 125491

llvm-svn: 125490

- Add custom operand matching for imod and iflags.
- Rename SplitMnemonicAndCC to SplitMnemonic since it splits more than CC
  from mnemonic.
- While adding ".w" as an operand, don't change "Head" to avoid passing the
  wrong mnemonic to ParseOperand.
- Add asm parser tests.
- Add disassembler tests just to make sure it can catch all cps versions.

llvm-svn: 125489

llvm-svn: 125488

idiom.  Change various clients to simplify their code.

llvm-svn: 125487

use in many places where we pass a pointer and size to abstract APIs
that can take C arrays, std::vector, SmallVector, etc.  It is to arrays
what StringRef is to strings.

llvm-svn: 125486

access-control diagnostics which arise from the portion of the declarator
following the scope specifier, just in case access is granted by
friending the individual method.  This can also happen with in-line
member function declarations of class templates due to templated-scope
friend declarations.

We were really playing fast-and-loose before with this sort of thing,
and it turned out to work because *most* friend functions are in file
scope.  Making us delay regardless of context exposed several bugs with
how we were manipulating delay.  I ended up needing a concept of a
context that's independent of the declarations in which it appears,
and then I actually had to make some things save contexts correctly,
but delay should be much cleaner now.

I also encapsulated all the delayed-diagnostics machinery in a single
subobject of Sema;  this is a pattern we might want to consider rolling
out to other components of Sema.

llvm-svn: 125485

llvm-svn: 125484

vector fp conversions.

llvm-svn: 125482

llvm-svn: 125481

llvm-svn: 125480

llvm-svn: 125478

llvm-svn: 125477

llvm-svn: 125476

FP_CONTRACT pragmas.  Patch originally by ARM.

llvm-svn: 125475

llvm-svn: 125474

llvm-svn: 125473

llvm-svn: 125471

have their low bits set to zero.  This allows us to optimize
out explicit stack alignment code like in stack-align.ll:test4 when
it is redundant.

Doing this causes the code generator to start turning FI+cst into
FI|cst all over the place, which is general goodness (that is the
canonical form) except that various pieces of the code generator
don't handle OR aggressively.  Fix this by introducing a new
SelectionDAG::isBaseWithConstantOffset predicate, and using it
in places that are looking for ADD(X,CST).  The ARM backend in
particular was missing a lot of addressing mode folding opportunities
around OR.

llvm-svn: 125470

llvm-svn: 125469

llvm-svn: 125468

implementation of co/contra-variance objc++
block pointers. // rdar://8979379.

llvm-svn: 125467

llvm-svn: 125466

generating i8 shift amounts for things like i1024 types.  Add
an assert in getNode to prevent this from occuring in the future,
fix the buggy transformation, revert my previous patch, and
document this gotcha in ISDOpcodes.h

llvm-svn: 125465

llvm-svn: 125464

llvm-svn: 125463

plus some variations of this.  According to my auto-simplifier this occurs a lot
but usually in combination with max/min idioms.  Because max/min aren't handled
yet this unfortunately doesn't have much effect in the testsuite.

llvm-svn: 125462

llvm-svn: 125460

It caused a crash in MultiSource/Benchmarks/Bullet.
Opt hit an assertion with "opt -std-compile-opts" because
Constant::getAllOnesValue doesn't know how to handle floats.

This patch added a test to reproduce the problem and a check that the
destination vector is of integer type.

Thank you Benjamin!

llvm-svn: 125459

the shift amounts are in a suitably wide type so that
we don't generate out of range constant shift amounts.

This fixes PR9028.

llvm-svn: 125458

is narrower than the shift register.  Doing an anyext provides undefined bits in
the top part of the register.

llvm-svn: 125457

llvm-svn: 125456

llvm-svn: 125455

We were previously simplifying divisions, but not right shifts!

llvm-svn: 125454