Commits · bd96e98af72b80c3d3b81849e45de92c8612475d · Roger Ferrer / llvm-epi-0.8 · GitLab

This project is archived. Its data is read-only.

Sep 08, 2015
- AVX-512: Lowering for 512-bit vector shuffles. · e88038f2
  Elena Demikhovsky authored Sep 08, 2015
  e88038f2
Sep 07, 2015
- add missing regression tests for De Morgan's Law transform in InstCombine · de28573e
  Sanjay Patel authored Sep 07, 2015
  de28573e
- [mips][microMIPS] Implement ABS.fmt, CEIL.L.fmt, CEIL.W.fmt, FLOOR.L.fmt,... · 7b856825
  Zoran Jovanovic authored Sep 07, 2015
  7b856825
- [mips][microMIPS] Implement BC16, BEQZC16 and BNEZC16 instructions · ada70918
  Zoran Jovanovic authored Sep 07, 2015
  ada70918
- [mips][microMIPS] Implement CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt,... · 14f308e4
  Zoran Jovanovic authored Sep 07, 2015
  14f308e4
Sep 06, 2015
- [X86][MMX] Added missing stack folding tests for MMX/SSSE3 instructions · 15fc1348
  Simon Pilgrim authored Sep 06, 2015
  15fc1348
- [X86][AVX512] Added 512-bit vector shift tests. · b38c09d7
  Simon Pilgrim authored Sep 06, 2015
  b38c09d7
- [InstCombine] Don't divide by zero when evaluating a potential transform · 135ca40a
  David Majnemer authored Sep 06, 2015
  135ca40a
- [SelectionDAG] Swap commutative binops before constant-based folding · 10aac5fd
  Hal Finkel authored Sep 06, 2015
  10aac5fd
- [PowerPC] Don't commute trivial rlwimi instructions · ccf9259c
  Hal Finkel authored Sep 06, 2015
  ccf9259c
Sep 05, 2015
- [InstCombine] Don't assume m_Mul gives back an Instruction · daa24b97
  David Majnemer authored Sep 05, 2015
  daa24b97
- [X86] Updated vector lzcnt tests. Added missing vec512 tests. · a1ceba8a
  Simon Pilgrim authored Sep 05, 2015
  a1ceba8a
- [X86] Updated vector tzcnt tests. Added vec512 tests. · 5cce4381
  Simon Pilgrim authored Sep 05, 2015
  5cce4381
- [X86] Updated vector popcnt tests. Added vec512 tests. · ba8ae5a8
  Simon Pilgrim authored Sep 05, 2015
  ba8ae5a8
- [mips][microMIPS] Implement ADD.fmt, SUB.fmt, MOV.fmt, MUL.fmt, DIV.fmt,... · 89ca2b98
  Zoran Jovanovic authored Sep 05, 2015
  89ca2b98
- [MC] Convert other MachO tests from macho-dump to llvm-readobj. · 591b5a5e
  Davide Italiano authored Sep 05, 2015
  591b5a5e
- [PowerPC] Fix and(or(x, c1), c2) -> rlwimi generation · b1518d6c
  Hal Finkel authored Sep 05, 2015
  b1518d6c
- Fixing bad test syntax. · a89baa21
  Andrew Kaylor authored Sep 04, 2015
  a89baa21
- [WinEH] Teach SimplfyCFG to eliminate empty cleanup pads. · 50e4e86c
  Andrew Kaylor authored Sep 04, 2015
  50e4e86c
Sep 04, 2015
- [X86][AVX] Test tidyup + regeneration. NFCI. · 0fccef6a
  Simon Pilgrim authored Sep 04, 2015
  0fccef6a
- Add powerpc64 to parallel.ll unsupported architecture list. · 07dcb58f
  Peter Collingbourne authored Sep 04, 2015
  07dcb58f
- Simplify testcase added in r246759. NFC · 44077da1
  Silviu Baranga authored Sep 04, 2015
  44077da1
- Fix the testcase in r246790 · 332eeca1
  Steven Wu authored Sep 04, 2015
  332eeca1
- [PowerPC] Enable interleaved-access vectorization · 4a7be239
  Hal Finkel authored Sep 04, 2015
  4a7be239
- [PowerPC] Always use aggressive interleaving on the A2 · 75afa2b6
  Hal Finkel authored Sep 03, 2015
  75afa2b6
- [PowerPC] Try harder to find a base+offset when looking for consecutive accesses · e6702ca0
  Hal Finkel authored Sep 03, 2015
  e6702ca0
- [IR] Have AttrBuilder::clear clear `TargetDepAttrs`. · 88d0fdeb
  Sanjoy Das authored Sep 03, 2015
  88d0fdeb
Sep 03, 2015
- [PowerPC] Include the permutation cost for unaligned vector loads · f11bc761
  Hal Finkel authored Sep 03, 2015
  f11bc761
- [PowerPC] Compute the MMO offset for an unaligned load with signed arithmetic · 99d95328
  Hal Finkel authored Sep 03, 2015
  99d95328
- [sancov] Disable sanitizer coverage on functions using SEH · df52337b
  Reid Kleckner authored Sep 03, 2015
  df52337b
- [AArch64] Improve ISel using across lane addition reduction. · 6c36eff1
  Chad Rosier authored Sep 03, 2015
  6c36eff1
- Allow global address space forward decls using IDs in .ll files. · 7772978c
  Karl Schimpf authored Sep 03, 2015
  7772978c
- [ARM] Add a test case for revision 243956. · 10ec8c4c
  Quentin Colombet authored Sep 03, 2015
  10ec8c4c
- Revert "[AArch64] Improve load/store optimizer to handle LDUR + LDR." · 08ef462d
  Chad Rosier authored Sep 03, 2015
  08ef462d
- [x86] enable machine combiner reassociations for scalar 'xor' insts · c9ae9d72
  Sanjay Patel authored Sep 03, 2015
  c9ae9d72
- Fix assertion failure in LLParser::ConvertValIDToValue · 44876c53
  Karl Schimpf authored Sep 03, 2015
  44876c53
- Remove binary characters from test file. · e564fcb1
  Karl Schimpf authored Sep 03, 2015
  e564fcb1
- Fix SEGV in InlineAsm::ConstraintInfo::Parse. · f04a5d59
  Karl Schimpf authored Sep 03, 2015
  f04a5d59
- check for fastness before merging in DAGCombiner::MergeConsecutiveStores() · ce74db9d
  Sanjay Patel authored Sep 03, 2015
  ce74db9d
- [AArch64] Improve load/store optimizer to handle LDUR + LDR. · 491a1bd9
  Chad Rosier authored Sep 03, 2015
  491a1bd9