Move platform independent code (lowering of possibly overwritten
arguments, check for tail call optimization eligibility) from
target X86ISelectionLowering.cpp to TargetLowering.h and
SelectionDAGISel.cpp.

Initial PowerPC tail call implementation:

Support ppc32 implemented and tested (passes my tests and
test-suite llvm-test).  
Support ppc64 implemented and half tested (passes my tests).
On ppc tail call optimization is performed if 
  caller and callee are fastcc
  call is a tail call (in tail call position, call followed by ret)
  no variable argument lists or byval arguments
  option -tailcallopt is enabled
Supported:
 * non pic tail calls on linux/darwin
 * module-local tail calls on linux(PIC/GOT)/darwin(PIC)
 * inter-module tail calls on darwin(PIC)
If constraints are not met a normal call will be emitted.

A test checking the argument lowering behaviour on x86-64 was added.

llvm-svn: 50477

llvm-svn: 50475

llvm-svn: 50474

llvm-svn: 50473

to instcombine.

llvm-svn: 50472

a fine job.

llvm-svn: 50470

llvm-svn: 50469

llvm-svn: 50468

llvm-svn: 50465

llvm-svn: 50464

llvm-svn: 50463

fixes are target-specific lowering of frame indices, fix constants generated
for the FSMBI instruction, and fixing SPUTargetLowering::computeMaskedBitsFor-
TargetNode().

llvm-svn: 50462

DAG.UpdateNodeOperands() is called before (not after) the call to
TLI.LowerOperation().

llvm-svn: 50461

targets.

llvm-svn: 50451

llvm-svn: 50448

Revert r50441.  The original code was correct.  Add some more comments so that I don't make the same mistake in the future.

llvm-svn: 50446

we were checking for it in the wrong order.  This caused a miscompilation because the
return slot optimization assumes that the call it is dealing with is NOT a memcpy.

llvm-svn: 50444

llvm-svn: 50442

of this was suggested by Chris.

llvm-svn: 50441

llvm-svn: 50437

llvm-svn: 50436

llvm-svn: 50433

This fixes the second half of PR2262

llvm-svn: 50430

llvm-svn: 50429

llvm-svn: 50428

This removes the existing bottleneck related to the removal of elements from 
the middle of the queue.

Also fixes a subtle bug in ScheduleDAGRRList::CapturePred:
It was updating the state of the SUnit before removing it. As a result, the
comparison operators were working incorrectly and this SUnit could not be removed 
from the queue properly.

Reviewed by Evan and Dan. Approved by Dan.

llvm-svn: 50412

generalizes the previous code to handle the case when the string is not
an immediate to the strlen call (for example, crazy stuff like 
strlen(c ? "foo" : "bart"+1) -> 3).  This implements 
gcc.c-torture/execute/builtins/strlen-2.c.  I will generalize other
cases in simplifylibcalls to use the same routine later.

llvm-svn: 50408

llvm-svn: 50406

stack anymore.

llvm-svn: 50397

llvm-svn: 50390

We now compile test2/test3 to:

_test2:
	## InlineAsm Start
	set %xmm0, %xmm1
	## InlineAsm End
	addps	%xmm1, %xmm0
	ret
_test3:
	## InlineAsm Start
	set %xmm0, %xmm1
	## InlineAsm End
	paddd	%xmm1, %xmm0
	ret

as expected.

llvm-svn: 50389

towards PR2094.  It now compiles the attached .ll file to:

_sad16_sse2:
	movslq	%ecx, %rax
	## InlineAsm Start
	%ecx %rdx %rax %rax %r8d %rdx %rsi
	## InlineAsm End
	## InlineAsm Start
	set %eax
	## InlineAsm End
	ret

which is pretty decent for a 3 output, 4 input asm.

llvm-svn: 50386

e.g.
vr1024<2> extract_subreg vr1025, 2
If vr1024 do not have the same register class as vr1025, it's not safe to coalesce this away. For example, vr1024 might be a GPR32 while vr1025 might be a GPR64.

llvm-svn: 50385

llvm-svn: 50384

llvm-svn: 50383

the trip count.

llvm-svn: 50382

llvm-svn: 50380

Add a new test, and_ops_more.ll, which is XFAIL'd, to
record the parts of and_ops.ll that were affected by this
change.

llvm-svn: 50379

llvm-svn: 50377

Fix a bug in RegsForValue::getCopyToRegs() that causes cyclical scheduling units. If it's creating multiple CopyToReg nodes that are "flagged" together, it should not create a TokenFactor for it's chain outputs:

c1, f1 = CopyToReg                                                                                                                                                                                             
c2, f2 = CopyToReg                                                                                                                                                                                             
c3     = TokenFactor c1, c2                                                                                                                                                                                    
 ...                                                                                                                                                                                                                      
       = user c3, ..., f2

Now that the two CopyToReg's and the user are "flagged" together. They effectively forms a single scheduling unit. The TokenFactor is now both an operand and a successor of the Flagged nodes.

llvm-svn: 50376