passed.

llvm-svn: 22886

after itself.

llvm-svn: 22376

llvm-svn: 22372

XMM registers.  There are many known deficiencies and fixmes, which will be
addressed ASAP.  The major benefit of this work is that it will allow the
LLVM register allocator to allocate FP registers across basic blocks.

The x86 backend will still default to x87 style FP.  To enable this work,
you must pass -enable-sse-scalar-fp and either -sse2 or -sse3 to llc.

An example before and after would be for:
double foo(double *P) { double Sum = 0; int i; for (i = 0; i < 1000; ++i)
                        Sum += P[i]; return Sum; }

The inner loop looks like the following:
x87:
.LBB_foo_1:     # no_exit
        fldl (%esp)
        faddl (%eax,%ecx,8)
        fstpl (%esp)
        incl %ecx
        cmpl $1000, %ecx
        #FP_REG_KILL
        jne .LBB_foo_1  # no_exit

SSE2:
        addsd (%eax,%ecx,8), %xmm0
        incl %ecx
        cmpl $1000, %ecx
        #FP_REG_KILL
        jne .LBB_foo_1  # no_exit

llvm-svn: 22340

currently use: llc t.bc --filetype=obj

This will produce a t.o file which is dumpable with readelf.  Currently
the file produced is empty, but the scaffolding to do more is now in place.

llvm-svn: 22292

* Convert tabs to spaces

llvm-svn: 21426

llvm-svn: 19332

llvm-svn: 16018

llvm-svn: 15787

again in the future, it can be resurrected out of CVS

llvm-svn: 15112

Tablgen files for really simple instruction selector

llvm-svn: 12714

implementation from the TargetMachine directly.

llvm-svn: 10636

llvm-svn: 10629

allocaton on the X86 to add information to the machine code denoting
that our floating point stackifier cannot handle virtual point
register that are alive across basic blocks. This pass adds an
implicit def of all virtual floating point register at the end of each
basic block.

llvm-svn: 10446

Eventually this pass will provide substantially better code in the interim between when we
have a crappy isel and nice isel.  Unfortunately doing so requires fixing the backend to
actually SUPPORT all of the fancy addressing modes that we now generate, and writing a DCE
pass for machine code.  Each of these is a fairly substantial job, so this will remain disabled
for the immediate future.  :(

llvm-svn: 10276

llvm-svn: 9903

llvm-svn: 9321

Correct one of the functions' comments.

llvm-svn: 7816

the early implementation phases, so it is disabled by default

llvm-svn: 7719

llvm-svn: 7542

llvm-svn: 7512

llvm-svn: 7352

  Printer::doFinalization() out in the cold.  Now we pass in a TargetMachine
  to Printer's constructor and get the TargetData from the TargetMachine.
 Don't pass TargetMachine or MRegisterInfo objects around in the Printer.
 Constify TargetData references.
X86.h: Update comment and prototype of createX86CodePrinterPass().
X86TargetMachine.cpp: Update callers of createX86CodePrinterPass().

llvm-svn: 7275

llvm-svn: 6581

llvm-svn: 5227

* New createPrologEpilogCodeInserter() function

llvm-svn: 5181

llvm-svn: 5077

llvm-svn: 5075

llvm-svn: 5071

* Expose information about implicit defs/uses of register through the
  MachineInstrInfo.h file.

llvm-svn: 4877

llvm-svn: 4741

llvm-svn: 4421

llvm-svn: 4413

llvm-svn: 4395

llvm-svn: 4367

We can instruction select exactly one instruction 'ret void'.  Wow.

llvm-svn: 4284