llvm-svn: 31506

by 40%, FreeBench/fourinarow by 20%, and many other programs 10-25%.

On PPC, this speeds up fourinarow by 18%, and probably other things as well.

llvm-svn: 31504

llvm-svn: 31500

llvm-svn: 31498

X86.  If happy, I'll enable this by default.

llvm-svn: 31493

llvm-svn: 31492

The low part goes in the first operand of expandop, not the second one.

llvm-svn: 31487

llvm-svn: 31485

llvm-svn: 31478

llvm-svn: 31477

NOTE: There doesn't seem to be consistency for whether a leading tab
is present in a section heading.

llvm-svn: 31475

llvm-svn: 31474

llvm-svn: 31473

llvm-svn: 31464

llvm-svn: 31463

llvm-svn: 31462

llvm-svn: 31460

llvm-svn: 31459

llvm-svn: 31458

their scope are being deleted.  Workaround is to widen scope to full function.

llvm-svn: 31454

llvm-svn: 31453

llvm-svn: 31450

that takes a register and condition code.  Print these pieces of BLR the
right way, even though it is currently set to 'always'.

Next up: get the JIT encoding right, then enhance branch folding to produce
predicated blr for simple examples.

llvm-svn: 31449

there may be other def(s) apart from the use&def two-address operand. We need
to check if the register reuse for a use&def operand may conflicts with another
def. Provide a mean to recover from the conflict if it is detected when the
defs are processed later.

llvm-svn: 31439

llvm-svn: 31438

llvm-svn: 31437

llvm-svn: 31436

llvm-svn: 31435

llvm-svn: 31434

llvm-svn: 31433

llvm-svn: 31431

llvm-svn: 31429

vector accesses like we handle out-of-range array accesses.

llvm-svn: 31427

llvm-svn: 31419

llvm-svn: 31417

improves readability of the call handling code significantly, as well as
makes it clear which parts are hacky (externals) and which parts are good
(call handling).

No functionality change.

llvm-svn: 31415

llvm-svn: 31414

llvm-svn: 31413

llvm-svn: 31412

llvm-svn: 31411