implementations with a new MachineInstr::isInvariantLoad, which uses
MachineMemOperands and is target-independent. This brings MachineLICM
and other functionality to targets which previously lacked an
isInvariantLoad implementation.

llvm-svn: 83475

llvm-svn: 83474

llvm-svn: 83471

This is just to be more consistent with the forthcoming code for vld3/4.

llvm-svn: 83470

a virtual register to eliminate a frame index, it can return that register
and the constant stored there to PEI to track. When scavenging to allocate
for those registers, PEI then tracks the last-used register and value, and
if it is still available and matches the value for the next index, reuses
the existing value rather and removes the re-materialization instructions.
Fancier tracking and adjustment of scavenger allocations to keep more
values live for longer is possible, but not yet implemented and would likely
be better done via a different, less special-purpose, approach to the
problem.

eliminateFrameIndex() is modified so the target implementations can return
the registers they wish to be tracked for reuse.

ARM Thumb1 implements and utilizes the new mechanism. All other targets are
simply modified to adjust for the changed eliminateFrameIndex() prototype.

llvm-svn: 83467

llvm-svn: 83462

llvm-svn: 83457

an unqualified PointerType* because it seems more correct.

llvm-svn: 83454

not intrinsics.

llvm-svn: 83441

llvm-svn: 83437

and register spills.

llvm-svn: 83435

for inlining.

When MallocInst goes away this code will be subsumed as part of
calls and work just fine...

llvm-svn: 83434

operands.  Some parsing of arm memory operands for preindexing and postindexing
forms including with register controled shifts.  This is a work in progress.

llvm-svn: 83424

llvm-svn: 83422

llvm-svn: 83421

some of the inputs were temporaries.  Here's a real fix for the miscompilation.
Thanks to sabre for pointing out the problem.

llvm-svn: 83417

Patch by Johnny Chen.

llvm-svn: 83407

string at the end of the list, instead of the last comma-separated string.

llvm-svn: 83405

llvm-svn: 83404

This is not yet enabled.

llvm-svn: 83400

verbose-asm mode, print comments instead. This eliminates a non-comment
difference between verbose-asm mode and non-verbose-asm mode.

Also, factor out the relevant code out of all the targets and into
target-independent code.

llvm-svn: 83392

llvm-svn: 83391

out of it, and jump threading, condprop and gvn are now getting
most of the benefit.  This was approved by Nicholas and Nicolas.

llvm-svn: 83390

xs1a and xs1b.

llvm-svn: 83383

early development boards which is no longer supported in the
XMOS toolchain.

llvm-svn: 83381

llvm-svn: 83380

where the element is of a basic builtin type.  For example, to get
an i8* use getInt8PtrTy.

llvm-svn: 83379

llvm-svn: 83378

llvm-svn: 83367

Update processDebugLoc() to handle requests to process debug info, before and after emitting instructions.

llvm-svn: 83364

Update processDebugLoc() so that it can be used to process debug info before and after printing an instruction.

llvm-svn: 83363

llvm-svn: 83362

This will be used by processDebugLoc().

llvm-svn: 83361

llvm-svn: 83356

llvm-svn: 83355

check-lit` on both x86-64 Linux and x86-32 Darwin.

llvm-svn: 83353

This code is not  yet enabled.

llvm-svn: 83349

Existence of a compile unit for input source file is a good indicator to check debug info's presence in a module.

llvm-svn: 83348

This can happen if debug info is processed lazily.

llvm-svn: 83347

void foo() { static int bar = 42; }
Here, foo's DIE is parent of bar's DIE.

llvm-svn: 83344